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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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Window Watchdog Timer (WDT0 / WWDT) model for ra8_emulator. More...
#include <stdint.h>#include <stdio.h>#include "board_periph.h"#include "board_periph_block.h"#include "emu_host_io_internal.h"Go to the source code of this file.
Data Structures | |
| struct | wdt_state_t |
| WDT model state. More... | |
Enumerations | |
| enum | wdt_geom_t : uint64_t { k_wdt_base = 0x40202600UL , k_wdt_span = 0x10UL , k_wdt_off_wdtrr = 0x00UL , k_wdt_off_wdtcr = 0x02UL , k_wdt_off_wdtsr = 0x04UL , k_wdt_off_wdtrcr = 0x06UL } |
| WDT0 block geometry (ra8_wdt_regs.h, r_wdt_regs_t). More... | |
| enum | wdt_field_t : uint32_t { k_wdt_refresh_a = 0x00U , k_wdt_refresh_b = 0xFFU , k_wdt_rcr_rstirqs = 0x80U , k_wdt_sr_cntval = 0x3FFFU , k_wdt_sr_undff = 0x4000U , k_wdt_timeout_ticks = 400U } |
| WDT register field constants (ra8_wdt_regs.h). More... | |
| enum | wdt_order_t : uint32_t { k_wdt_block_order = 180U } |
| Per-tick order slot for the WDT block (relative order only). More... | |
Functions | |
| static RA8_INTERNAL void | internal_wdt_tick (uc_engine *uc) |
| Per-chunk advance: run the armed down-counter; reset on underflow. | |
| static RA8_INTERNAL void | internal_wdt_reset (void) |
| Reset the WDT model to power-on state. | |
| static RA8_INTERNAL uint64_t | internal_wdt_read (uc_engine *uc, uint64_t addr, unsigned size) |
| MMIO read inside the WDT window. | |
| static RA8_INTERNAL void | internal_wdt_write (uc_engine *uc, uint64_t addr, unsigned size, uint64_t value) |
| MMIO write inside the WDT window. | |
| static RA8_INTERNAL void | internal_wdt_report (void) |
| End-of-run WDT section: refreshes and whether it fired a reset. | |
| static RA8_INTERNAL void | internal_wdt_block_register (void) |
| Register the WDT0 block before main (host constructor). | |
Variables | |
| static wdt_state_t | s_wdt |
| static const board_periph_block_t | s_k_wdt_block |
| WDT0 block descriptor (self-registered with the core). | |
Window Watchdog Timer (WDT0 / WWDT) model for ra8_emulator.
Models the RA8D2 WDT0 (ra8_wdt_regs.h, ra8_wdt.c) at 0x40202600 closely enough that a watchdog reset actually fires when the firmware stops refreshing the counter, instead of the timeout never happening. Against the sparse fallback wdt_reset_recovery_demo armed the WWDT for reset and then stopped refreshing, but the chip never reset, so the post-reset boot (and its "wdt: reset_by=watchdog" banner) was unreachable. This block runs the down-counter and, on underflow in reset mode, asks the run loop to warm-reboot the firmware with the watchdog-reset cause latched, so the next boot reads k_ra8_reset_cause_wdt0.
Behaviour (HUM Ch 27.2):
WDTRR (0x00) is the refresh register: the 0x00 then 0xFF unlock sequence both ARMS the counter (the first refresh starts it) and RELOADS it to full. A stray write that breaks the sequence is ignored here (the model does not synthesise the refresh-error path).WDTCR (0x02) selects the timeout period (TOPS); shadowed so a read back works. The board emulator has no real watchdog clock, so the timeout maps to a fixed number of emulation ticks (one tick == one run-loop chunk): large enough that a normally-refreshing app stays alive, small enough that a deliberate stop trips within the run budget.WDTSR (0x04) reports the live down-counter in CNTVAL and the UNDFF underflow flag.WDTRCR (0x06) RSTIRQS selects reset (1) vs NMI / IRQ (0) on underflow.The per-chunk tick hook decrements the counter once it is armed; when it reaches zero with RSTIRQS set, it raises the reboot request and disarms (so it fires exactly once). With RSTIRQS clear (NMI / IRQ mode), the underflow latches UNDFF but does not reboot – the board emulator does not route the WDT NMI.
Definition in file board_periph_wdt.c.
| enum wdt_field_t : uint32_t |
WDT register field constants (ra8_wdt_regs.h).
Definition at line 58 of file board_periph_wdt.c.
| enum wdt_geom_t : uint64_t |
WDT0 block geometry (ra8_wdt_regs.h, r_wdt_regs_t).
Definition at line 48 of file board_periph_wdt.c.
| enum wdt_order_t : uint32_t |
Per-tick order slot for the WDT block (relative order only).
| Enumerator | |
|---|---|
| k_wdt_block_order | After the reset block; report order. |
Definition at line 71 of file board_periph_wdt.c.
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Register the WDT0 block before main (host constructor).
Definition at line 230 of file board_periph_wdt.c.
References board_periph_register_block(), RA8_INTERNAL, and s_k_wdt_block.
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MMIO read inside the WDT window.
MMIO read inside the wdt window; this step is contained within the board periph watchdog model and uses bounded caller or module-owned storage.
| [in,out] | uc | Unicorn engine whose emulated state is read or updated. |
| [in] | addr | Guest address involved in the operation. |
| [in] | size | Size of the requested region or access in bytes. |
| value | The operation-specific watchdog read value. |
Definition at line 144 of file board_periph_wdt.c.
References k_wdt_base, k_wdt_off_wdtcr, k_wdt_off_wdtrcr, k_wdt_off_wdtsr, k_wdt_sr_cntval, RA8_INTERNAL, and s_wdt.
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End-of-run WDT section: refreshes and whether it fired a reset.
End-of-run wdt section: refreshes and whether it fired a reset; this step is contained within the board periph watchdog model and uses bounded caller or module-owned storage.
Definition at line 205 of file board_periph_wdt.c.
References priv_emu_io_errf(), RA8_INTERNAL, and s_wdt.
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Reset the WDT model to power-on state.
Reset the wdt model to power-on state; this step is contained within the board periph watchdog model and uses bounded caller or module-owned storage.
Definition at line 126 of file board_periph_wdt.c.
References RA8_INTERNAL, and s_wdt.
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Per-chunk advance: run the armed down-counter; reset on underflow.
Per-chunk advance: run the armed down-counter; reset on underflow; this step is contained within the board periph watchdog model and uses bounded caller or module-owned storage.
| [in,out] | uc | Unicorn engine whose emulated state is read or updated. |
Definition at line 98 of file board_periph_wdt.c.
References board_periph_reset_request_reboot(), k_wdt_rcr_rstirqs, k_wdt_sr_undff, RA8_INTERNAL, and s_wdt.
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MMIO write inside the WDT window.
MMIO write inside the wdt window; this step is contained within the board periph watchdog model and uses bounded caller or module-owned storage.
| [in,out] | uc | Unicorn engine whose emulated state is read or updated. |
| [in] | addr | Guest address involved in the operation. |
| [in] | size | Size of the requested region or access in bytes. |
| [in] | value | Register or payload value involved in the operation. |
Definition at line 175 of file board_periph_wdt.c.
References k_wdt_base, k_wdt_off_wdtcr, k_wdt_off_wdtrcr, k_wdt_off_wdtrr, k_wdt_refresh_a, k_wdt_refresh_b, k_wdt_timeout_ticks, and s_wdt.
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WDT0 block descriptor (self-registered with the core).
Definition at line 217 of file board_periph_wdt.c.
Referenced by internal_wdt_block_register().
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Definition at line 87 of file board_periph_wdt.c.
Referenced by internal_wdt_read(), internal_wdt_report(), internal_wdt_reset(), internal_wdt_tick(), and internal_wdt_write().