48typedef enum : uint64_t {
58typedef enum : uint32_t {
71typedef enum : uint32_t {
104 if (
s_wdt.counter > 0U) {
148 const uint64_t off = addr - (uint64_t)
k_wdt_base;
154 return (uint64_t)(cnt |
s_wdt.undff);
179 const uint64_t off = addr - (uint64_t)
k_wdt_base;
181 const uint8_t b = (uint8_t)value;
191 s_wdt.wdtcr = (uint16_t)value;
193 s_wdt.wdtrcr = (uint8_t)value;
207 if ((
s_wdt.refreshes == 0U) && !
s_wdt.fired) {
212 (
unsigned)
s_wdt.armed,
213 (
unsigned)
s_wdt.fired);
Register-accurate peripheral-model framework for the board emulator.
void board_periph_reset_request_reboot(bool watchdog, bool iwdt)
Request a warm reboot from a peripheral model (e.g.
Decentralized peripheral-block registry for the board emulator core.
void board_periph_register_block(const board_periph_block_t *block)
Register a peripheral block's descriptor with the core registry.
static RA8_INTERNAL void internal_wdt_tick(uc_engine *uc)
Per-chunk advance: run the armed down-counter; reset on underflow.
static RA8_INTERNAL void internal_wdt_write(uc_engine *uc, uint64_t addr, unsigned size, uint64_t value)
MMIO write inside the WDT window.
static RA8_INTERNAL uint64_t internal_wdt_read(uc_engine *uc, uint64_t addr, unsigned size)
MMIO read inside the WDT window.
static RA8_INTERNAL void internal_wdt_block_register(void)
Register the WDT0 block before main (host constructor).
wdt_field_t
WDT register field constants (ra8_wdt_regs.h).
@ k_wdt_timeout_ticks
Wdt timeout ticks.
@ k_wdt_refresh_b
Second byte of the refresh sequence.
@ k_wdt_sr_cntval
WDTSR.CNTVAL[13:0] live counter.
@ k_wdt_sr_undff
WDTSR.UNDFF underflow flag (bit 14).
@ k_wdt_refresh_a
First byte of the refresh sequence.
@ k_wdt_rcr_rstirqs
WDTRCR.RSTIRQS: 1 = reset on underflow.
wdt_order_t
Per-tick order slot for the WDT block (relative order only).
@ k_wdt_block_order
After the reset block; report order.
static const board_periph_block_t s_k_wdt_block
WDT0 block descriptor (self-registered with the core).
static RA8_INTERNAL void internal_wdt_reset(void)
Reset the WDT model to power-on state.
static RA8_INTERNAL void internal_wdt_report(void)
End-of-run WDT section: refreshes and whether it fired a reset.
wdt_geom_t
WDT0 block geometry (ra8_wdt_regs.h, r_wdt_regs_t).
@ k_wdt_off_wdtcr
WDTCR control (16b).
@ k_wdt_base
WDT0 base (HUM Ch 27).
@ k_wdt_span
Covers WDTRR..WDTRCR.
@ k_wdt_off_wdtrcr
WDTRCR reset control (8b).
@ k_wdt_off_wdtsr
WDTSR status (16b).
@ k_wdt_off_wdtrr
WDTRR refresh register (8b).
Bounded raw-descriptor I/O seam for the RA8 emulator.
emu_io_result_t priv_emu_io_errf(const char *format,...)
Format bounded text and write it to the injected error descriptor.
#define RA8_INTERNAL
Marker that a function is intended to be static (file-local).
A modelled peripheral block's self-description for the core registry.
uint32_t refreshes
Refreshes serviced (for the report).
bool armed
Counter is running (first refresh seen).
uint16_t undff
UNDFF status latch.
bool fired
Reset already requested (one-shot).
uint32_t counter
Down-counter, in ticks.
uint16_t wdtcr
WDTCR shadow (timeout / window select).
uint8_t wdtrcr
WDTRCR shadow (RSTIRQS).
uint8_t last_rr
Last WDTRR byte (for the 0x00->0xFF seq).