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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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Module-private graphics power-domain state for the gated blocks. More...
#include "ra8_attributes.h"Go to the source code of this file.
Functions | |
| bool | priv_board_pdctr_graphics_powered (void) |
| Report whether the graphics power domain is currently powered. | |
Module-private graphics power-domain state for the gated blocks.
The RA8D2 graphics power domain (MIPI DSI, MIPI CSI, VIN, DRW, GLCDC – HUM Ch 11.5.1 Table 11.7 p 480) is gated OFF at reset by PDCTRGD (HUM Ch 11.2.14 p 452). While it is gated, the peripherals inside it are unpowered: their registers read 0 and their writes are lost.
board_periph_pdctr.c owns PDCTRGD; the blocks that model peripherals inside the domain ask priv_board_pdctr_graphics_powered before reporting a live register value, so the emulator shows a dark domain exactly as the bench does. This header is the seam between them.
Definition in file board_periph_pdctr_internal.h.
| bool priv_board_pdctr_graphics_powered | ( | void | ) |
Report whether the graphics power domain is currently powered.
Tracks PDCTRGD.PDPGSF: false while the domain is gated off (the reset state), true once firmware has cleared PDDE with PRCR.PRC1 unlocked.
true when the graphics domain is powered on. | true | PDPGSF == 0: DRW / GLCDC / MIPI / VIN are alive. |
| false | Domain still gated; those peripherals read 0. |
Definition at line 89 of file board_periph_pdctr.c.
References k_pdctr_pdpgsf_mask, RA8_PRIV, and s_pdctr.
Referenced by internal_drw_read(), internal_drw_render_modelled(), internal_drw_write(), and internal_pdctr_write().