board_periph_pdctr.c

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#include <stdint.h>
#include <stdio.h>
 
#include "board_periph_block.h"
#include "board_periph_pdctr_internal.h"
#include "board_periph_prcr_internal.h"
#include "emu_host_io_internal.h"
#include "ra8_attributes.h"

typedef enum : uint64_t {
  k_pdctr_gd_base = 0x4001E110UL, 
  k_pdctr_gd_span = 0x1UL,        
} pdctr_geom_t;

typedef enum : uint8_t {
  k_pdctr_pdde_mask   = 0x01U, 
  k_pdctr_pdcsf_mask  = 0x40U, 
  k_pdctr_pdpgsf_mask = 0x80U, 
  k_pdctr_reset_value = 0x81U, 
} pdctr_mask_t;

typedef enum : uint32_t {
  k_pdctr_block_order = 172U, 
} pdctr_order_t;

typedef struct {
  uint8_t  pdctrgd;  
  uint32_t power_on; 
  uint32_t blocked;  
} pdctr_state_t;
 
static pdctr_state_t s_pdctr;

RA8_INTERNAL static void internal_pdctr_reset(void)
{
  s_pdctr         = (pdctr_state_t){};
  s_pdctr.pdctrgd = (uint8_t)k_pdctr_reset_value;
}
 
RA8_PRIV bool priv_board_pdctr_graphics_powered(void)
{
  return (uint8_t)(s_pdctr.pdctrgd & (uint8_t)k_pdctr_pdpgsf_mask) == 0U;
}

RA8_INTERNAL static uint64_t internal_pdctr_read(uc_engine* uc, uint64_t addr, unsigned size)
{
  (void)uc;
  (void)addr;
  (void)size;
  return (uint64_t)s_pdctr.pdctrgd;
}

RA8_INTERNAL static void
internal_pdctr_write(uc_engine* uc, uint64_t addr, unsigned size, uint64_t value)
{
  (void)uc;
  (void)addr;
  (void)size;
  /* HUM Ch 13.1 Table 13.1 p 521 lists PDCTRGD under PRC1: a write with that
   * group locked is discarded by the hardware with no fault and no flag. */
  if (!priv_board_prcr_group_unlocked((uint16_t)k_board_prcr_grp1_lpm)) {
    s_pdctr.blocked++;
    return;
  }
  const bool power_off = ((uint8_t)value & (uint8_t)k_pdctr_pdde_mask) != 0U;
  if (power_off) {
    s_pdctr.pdctrgd = (uint8_t)(k_pdctr_pdde_mask | k_pdctr_pdpgsf_mask);
    return;
  }
  if (!priv_board_pdctr_graphics_powered()) {
    s_pdctr.power_on++;
  }
  s_pdctr.pdctrgd = 0U; /* PDDE=0, PDCSF=0 (settled), PDPGSF=0 (powered). */
}

RA8_INTERNAL static void internal_pdctr_report(void)
{
  if (s_pdctr.blocked != 0U) {
    /* Loud: PDCTRGD writes need PRCR.PRC1 unlocked or the domain stays dark. */
    (void)priv_emu_io_errf(
      "  PWR-GRAPHICS  : PDCTRGD writes DROPPED=%u (PRCR.PRC1 locked: unlock 0xA502)\n",
      s_pdctr.blocked);
    return;
  }
  if (s_pdctr.power_on == 0U) {
    return; /* Untouched: stay quiet (domain still gated, as at reset). */
  }
  (void)priv_emu_io_errf("  PWR-GRAPHICS  : graphics power domain on (DRW/GLCDC/MIPI/VIN)\n");
}

static const board_periph_block_t s_k_pdctr_block = {
  .base   = (uint64_t)k_pdctr_gd_base,
  .span   = (uint64_t)k_pdctr_gd_span,
  .order  = (uint32_t)k_pdctr_block_order,
  .read   = internal_pdctr_read,
  .write  = internal_pdctr_write,
  .tick   = nullptr,
  .reset  = internal_pdctr_reset,
  .report = internal_pdctr_report,
  .name   = "PWR-GRAPHICS",
};

[[gnu::constructor]] RA8_INTERNAL static void internal_pdctr_block_register(void)
{
  board_periph_register_block(&s_k_pdctr_block);
  internal_pdctr_reset();
}