ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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board_periph_prcr_internal.h File Reference

Module-private PRCR unlock state shared with the protected blocks. More...

#include <stdint.h>
#include "ra8_attributes.h"
Include dependency graph for board_periph_prcr_internal.h:
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Go to the source code of this file.

Enumerations

enum  board_prcr_group_t : uint16_t {
  k_board_prcr_grp0_cgc = 0x0001U ,
  k_board_prcr_grp1_lpm = 0x0002U ,
  k_board_prcr_grp3_pvd = 0x0008U ,
  k_board_prcr_grp4_sar = 0x0010U ,
  k_board_prcr_grp5_rst = 0x0020U
}
 PRCR group bits (HUM Ch 13.2.1 "PRCR_S" p 522). More...

Functions

bool priv_board_prcr_group_unlocked (uint16_t group_mask)
 Report whether every bit in group_mask is currently unlocked.

Detailed Description

Module-private PRCR unlock state shared with the protected blocks.

The RA8D2 gates writes to whole families of registers behind the SYSC Protect Register (PRCR, 0x4001_E3FA) – HUM Ch 13.1 Table 13.1 "Association between PRCR bits and use of registers to be protected" p 520-521. A write issued to a protected register while its group bit is 0 is discarded by the hardware with no fault and no status flag, so a driver that forgets the unlock appears to work and changes nothing.

board_periph_prcr.c snoops PRCR and keeps the live group mask; the blocks that model protected registers ask priv_board_prcr_group_unlocked before accepting a write, so the emulator drops exactly the writes the silicon drops. This header is the seam between them.

Copyright
Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT
Since
0.1.0

Definition in file board_periph_prcr_internal.h.

Enumeration Type Documentation

◆ board_prcr_group_t

enum board_prcr_group_t : uint16_t

PRCR group bits (HUM Ch 13.2.1 "PRCR_S" p 522).

Bit 2 and bits 7:6 are reserved (read as 0). Bits 15:8 carry the mandatory 0xA5 write key and are not part of the retained mask.

Invariant
Each value sets exactly one bit.
See also
priv_board_prcr_group_unlocked
Enumerator
k_board_prcr_grp0_cgc 

PRC0: clock generation circuit.

k_board_prcr_grp1_lpm 

PRC1: low-power modes + VBATT backup.

k_board_prcr_grp3_pvd 

PRC3: PVD + VBATTMNSELR.

k_board_prcr_grp4_sar 

PRC4: security/privilege attribution.

k_board_prcr_grp5_rst 

PRC5: reset control.

Definition at line 43 of file board_periph_prcr_internal.h.

Function Documentation

◆ priv_board_prcr_group_unlocked()

bool priv_board_prcr_group_unlocked ( uint16_t group_mask)

Report whether every bit in group_mask is currently unlocked.

Reflects the last PRCR write that carried the correct 0xA5 key. A write with a wrong key is ignored by the hardware and by this model, so the mask keeps its previous value.

Parameters
[in]group_maskOne or more k_board_prcr_grp* bits.
Returns
true when all requested groups are write-enabled.
Return values
trueEvery bit in group_mask is set in the live PRCR mask.
falseAt least one requested group is still locked.
Precondition
group_mask names only bits defined by board_prcr_group_t.
The PRCR block is registered (host constructor, before main).
Postcondition
No state is mutated.
Note
Not thread-safe; ra8_emulator drives all blocks from one thread.
Since
0.1.0
Postcondition
Ownership of caller-supplied storage is unchanged.

Definition at line 90 of file board_periph_prcr.c.

References RA8_PRIV, and s_prcr.

Referenced by internal_bkup_write(), and internal_pdctr_write().