board_periph_npu.c File Reference

Arm Ethos-U55 NPU command/queue execution model (RA8P1-only) for ra8_emulator. More...

#include <stdint.h>
#include <stdio.h>
#include "board_console.h"
#include "board_periph_block.h"
#include "emu_host_io_internal.h"
#include "ra8_npu_fake_cmd.h"

Include dependency graph for board_periph_npu.c:

Go to the source code of this file.

Data Structures
struct	npu_cmd_t
	One decoded fake command (see ra8_npu_fake_cmd.h). More...
struct	npu_state_t
	NPU model state: register shadow + job tally for the end-of-run report. More...

Enumerations
enum	npu_map_t : uint64_t {   k_npu_base = 0x40140000UL ,   k_npu_span = 0x1000UL ,   k_npu_words = 0x1000UL / 4UL ,   k_npu_off_id = 0x0000UL ,   k_npu_off_status = 0x0004UL ,   k_npu_off_cmd = 0x0008UL ,   k_npu_off_reset = 0x000CUL ,   k_npu_off_qbase = 0x0010UL ,   k_npu_off_qsize = 0x0020UL ,   k_npu_off_basep0 = 0x0080UL }
	Ethos-U55 NPU register-window geometry (mirrors ra8_npu_regs.h). More...
enum	npu_geom_t : uint32_t {   k_npu_reg_hi_off = 0x0004U ,   k_npu_basep_stride = 0x0008U ,   k_npu_region_count = 8U ,   k_npu_addr_hi_pos = 32U }
	Ethos-U55 64-bit-register geometry + region count (mirrors ra8_npu_regs.h). More...
enum	npu_bit_t : uint32_t {   k_npu_cmd_run_bit = 0U ,   k_npu_cmd_clear_irq_bit = 1U ,   k_npu_status_state_bit = 0U ,   k_npu_status_irq_bit = 1U ,   k_npu_status_buserr_bit = 2U ,   k_npu_status_reset_bit = 3U ,   k_npu_status_parse_bit = 4U ,   k_npu_status_cmdend_bit = 5U }
	NPU_CMD / NPU_STATUS bit positions (mirror ra8_npu_regs.h). More...
enum	npu_id_pos_t : uint32_t {   k_npu_id_arch_major_pos = 28U ,   k_npu_id_arch_minor_pos = 20U ,   k_npu_id_arch_patch_pos = 16U ,   k_npu_id_product_pos = 12U }
	NPU_ID field positions in the Ethos-U55 id register. More...
enum	npu_id_val_t : uint32_t {   k_npu_id_arch_major = 1U ,   k_npu_id_arch_minor = 0U ,   k_npu_id_arch_patch = 6U ,   k_npu_id_product_u55 = 0U }
	NPU_ID field values for the Ethos-U55. More...
enum	npu_misc_t : uint32_t {   k_npu_event_irq = 0x067U ,   k_npu_block_order = 15U }
	NPU interrupt event number and this block's report/tick order slot. More...
enum	npu_exec_const_t : uint32_t {   k_npu_chunk_bytes = 256U ,   k_npu_max_chunks = 16U ,   k_npu_fnv_offset = 0x811C9DC5U ,   k_npu_fnv_prime = 0x01000193U ,   k_npu_line_cap = 64U }
	Stand-in "execution" bounds + checkword constants (deterministic). More...
enum	npu_dec_t : uint8_t {   k_npu_dec_ok = 0U ,   k_npu_dec_parse = 1U ,   k_npu_dec_bus = 2U }
	Result of decoding one submitted command stream. More...

Functions
static RA8_INTERNAL uint32_t	internal_npu_word (uint64_t off)
	Word index of a byte offset inside the shadow store.
static RA8_INTERNAL uint64_t	internal_npu_reg64 (uint64_t lo_off)
	Assemble the 64-bit value of a lo/hi shadow-register pair.
static RA8_INTERNAL uint64_t	internal_npu_region_base (uint32_t idx)
	AXI base programmed into BASEPidx (0 if unprogrammed).
static RA8_INTERNAL bool	internal_npu_guest_word (uc_engine *uc, uint64_t addr, uint32_t *out)
	Read one little-endian 32-bit word from guest memory (bool ok).
static RA8_INTERNAL void	internal_npu_fault (uint32_t status_bit)
	Latch a STATUS fault bit and stop the engine (honest: no fake done).
static RA8_INTERNAL npu_dec_t	internal_npu_decode (uc_engine *uc, npu_cmd_t *out)
	Decode the submitted command stream at QBASE per ra8_npu_fake_cmd.h.
static RA8_INTERNAL bool	internal_npu_apply (uc_engine *uc, const npu_cmd_t *c, uint64_t src, uint64_t dst, uint32_t *out_check)
	Apply the op to the arenas; fold the output into a checkword (bool ok).
static RA8_INTERNAL const char *	internal_npu_op_name (uint32_t op)
	Human label for a fake opcode (report / console).
static RA8_INTERNAL void	internal_npu_console_job (const npu_cmd_t *c, uint32_t check)
	Push one completed-job summary line to the DMA/compute console lane.
static RA8_INTERNAL void	internal_npu_execute (uc_engine *uc)
	Run one submitted job: decode -> execute -> latch STATUS + IRQ.
static RA8_INTERNAL void	internal_npu_on_cmd (uc_engine *uc, uint32_t value)
	Act on an NPU_CMD write: run kicks a job, clear_irq de-asserts the IRQ.
static RA8_INTERNAL uint64_t	internal_npu_read (uc_engine *uc, uint64_t addr, unsigned size)
	MMIO read inside the NPU window: ID + STATUS are computed, rest shadow.
static RA8_INTERNAL void	internal_npu_write (uc_engine *uc, uint64_t addr, unsigned size, uint64_t value)
	MMIO write inside the NPU window: latch, then act on CMD / RESET.
static RA8_INTERNAL void	internal_npu_reset (void)
	Clear the NPU model to power-on state.
static RA8_INTERNAL void	internal_npu_report (void)
	End-of-run NPU section: jobs run + last-result checkword, or touch notice.
static RA8_INTERNAL void	internal_npu_block_register (void)
	Register the NPU block before main (host constructor).

Variables
static npu_state_t	s_npu
static const uint32_t	s_npu_id
	Composited Ethos-U55 NPU_ID (arch 1.0.6, product 0 = U55).
static const board_periph_block_t	s_k_npu_block
	NPU block descriptor (RA8P1-only; self-registered with the core).

Detailed Description

Arm Ethos-U55 NPU command/queue execution model (RA8P1-only) for ra8_emulator.

The RA8P1 (R7KA8P1KFLCAC) integrates an Arm Ethos-U55 micro-NPU that the RA8D2 does not have; it occupies a 4 KiB register window at 0x40140000 – the confirmed base + extent from libs/ra8_hal/inc/ra8_npu_regs.h (cross-sourced there against the RA8P1 FSP CMSIS header and the Zephyr device tree). This block gives that window a WORKING model so the ra8_npu driver's submit -> run -> poll -> read-output protocol runs end-to-end in the emulator. It is tagged k_board_block_dev_ra8p1 so it is dispatched ONLY when ra8_emulator runs the RA8P1 profile (--device ra8p1); on the RA8D2 the window falls through to the sparse fallback, so the RA8D2 run is unchanged.

What is modelled (register interface, TRM-sourced)

The Ethos-U55 command/queue interface is the Arm "Ethos-U55 NPU Technical Reference Manual" architectural APB map; the offsets and field bits below MIRROR libs/ra8_hal/inc/ra8_npu_regs.h (the primary-source transcription – that header is guarded to RA8P1 firmware builds and cannot be included in this host build, so the constants are restated with an Ethos-U55 TRM citation, exactly as board_periph_pdm.c / board_periph_ceu.c restate their register maps). Offsets and bit indices that trace to general knowledge of the published Ethos-U55 interface rather than a datasheet opened here are flagged [CONFIRM].

Modelled registers: NPU_ID (returns a documented Ethos-U55 id), NPU_STATUS (state / cmd_end / irq / fault bits, computed from job state), NPU_CMD (run / clear_irq), NPU_RESET (clears job state), QBASE / QSIZE (command-stream pointer + length), and BASEP0..7 (per-tensor AXI region bases).

The "execution" is a DETERMINISTIC RA8_EMULATOR STAND-IN, not real Vela

ra8_emulator is NOT a Vela interpreter (real Vela-compiled inference is the follow-up on the RA8P1 NPU epic). When the driver kicks a job (CMD.transition_to_running_state) this block reads the command stream at QBASE and applies a tiny, DOCUMENTED stand-in convention – see libs/ra8_hal/inc/ra8_npu_fake_cmd.h – to the tensor arenas at BASEPn: the first command word carries a "SE55" magic marker plus a COPY or add-constant opcode, and the model moves the referenced bytes from the source region to the destination region so the OUTPUT arena holds a checkable, deterministic result. On success it sets STATUS.cmd_end + STATUS.irq_raised and raises the NPU_IRQ ELC event (k_npu_event_irq), so ra8_npu_poll / ra8_npu_read_status see completion.

HONEST-MODEL rule (the ra8_rsip "invented register" history is the cautionary tale): a command stream that does NOT carry the fake magic is a real Vela program this model cannot interpret, so it latches STATUS.cmd_parse (a fault) rather than faking a completion. Nothing here claims real NPU numerics.

Copyright

Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Since

0.1.0

Definition in file board_periph_npu.c.

Enumeration Type Documentation

npu_bit_t

enum npu_bit_t : uint32_t

NPU_CMD / NPU_STATUS bit positions (mirror ra8_npu_regs.h).

[CONFIRM]

Bit indices trace to the Ethos-U55 TRM CMD / STATUS field layout; they are flagged [CONFIRM] as they come from general knowledge of the published interface, matching ra8_npu_regs.h.

Enumerator
k_npu_cmd_run_bit	CMD.transition_to_running_state (start).
k_npu_cmd_clear_irq_bit	CMD.clear_irq (write 1 to acknowledge).
k_npu_status_state_bit	STATUS.state (1 = running).
k_npu_status_irq_bit	STATUS.irq_raised.
k_npu_status_buserr_bit	STATUS.bus_error (AXI fault).
k_npu_status_reset_bit	STATUS.reset (reset in progress).
k_npu_status_parse_bit	STATUS.cmd_parse (parse error).
k_npu_status_cmdend_bit	STATUS.cmd_end (stream fully consumed).

Definition at line 101 of file board_periph_npu.c.

npu_dec_t

enum npu_dec_t : uint8_t

Result of decoding one submitted command stream.

Enumerator
k_npu_dec_ok	Recognised fake program; fields valid.
k_npu_dec_parse	Bad magic / field: real-Vela or malformed.
k_npu_dec_bus	Guest-memory read of the stream failed.

Definition at line 171 of file board_periph_npu.c.

npu_exec_const_t

enum npu_exec_const_t : uint32_t

Stand-in "execution" bounds + checkword constants (deterministic).

k_npu_chunk_bytes / k_npu_max_chunks give the transfer loop a static upper bound (k_ra8_npu_fake_max_bytes total). The FNV-1a constants fold the output bytes into a report/console checkword.

Enumerator
k_npu_chunk_bytes	Bytes moved per transfer-loop chunk.
k_npu_max_chunks	k_ra8_npu_fake_max_bytes / chunk (bound).
k_npu_fnv_offset	FNV-1a 32-bit offset basis.
k_npu_fnv_prime	FNV-1a 32-bit prime.
k_npu_line_cap	Console line buffer cap.

Definition at line 160 of file board_periph_npu.c.

npu_geom_t

enum npu_geom_t : uint32_t

Ethos-U55 64-bit-register geometry + region count (mirrors ra8_npu_regs.h).

Enumerator
k_npu_reg_hi_off	Low->high word gap in a 64-bit register.
k_npu_basep_stride	Bytes between BASEPn pairs (lo + hi).
k_npu_region_count	BASEP0..7 region base-pointer pairs.
k_npu_addr_hi_pos	uint64 address -> high 32 bits.

Definition at line 87 of file board_periph_npu.c.

npu_id_pos_t

enum npu_id_pos_t : uint32_t

NPU_ID field positions in the Ethos-U55 id register.

[CONFIRM]

The id register packs arch major/minor/patch and product-major nibbles (Arm Ethos-U id layout). Positions are [CONFIRM] – from general knowledge of the open ethosu_interface.h id bitfield, not a datasheet opened here.

Enumerator
k_npu_id_arch_major_pos	id[31:28] arch_major_rev.
k_npu_id_arch_minor_pos	id[27:20] arch_minor_rev.
k_npu_id_arch_patch_pos	id[19:16] arch_patch_rev.
k_npu_id_product_pos	id[15:12] product_major (0 = U55).

Definition at line 120 of file board_periph_npu.c.

npu_id_val_t

enum npu_id_val_t : uint32_t

NPU_ID field values for the Ethos-U55.

[CONFIRM]

Composited into s_npu_id below. arch = 1.0.6 and product_major = 0 (0 is believed to denote Ethos-U55, 1 Ethos-U65) are [CONFIRM] general-knowledge values; the driver only needs a stable non-zero id, and npu_smoke asserts on the executed OUTPUT, not on this constant.

Enumerator
k_npu_id_arch_major	arch major revision. [CONFIRM]
k_npu_id_arch_minor	arch minor revision. [CONFIRM]
k_npu_id_arch_patch	arch patch revision. [CONFIRM]
k_npu_id_product_u55	product_major: 0 = Ethos-U55. [CONFIRM]

Definition at line 135 of file board_periph_npu.c.

npu_map_t

enum npu_map_t : uint64_t

Ethos-U55 NPU register-window geometry (mirrors ra8_npu_regs.h).

Base + 4 KiB extent are the confirmed constants from ra8_npu_regs.h; the register offsets are the Ethos-U55 TRM APB map. Offsets restated from general knowledge of the published interface are [CONFIRM].

Enumerator
k_npu_base	R_NPU register-window base (Ethos-U55).
k_npu_span	4 KiB register window.
k_npu_words	Backing-store word count.
k_npu_off_id	NPU_ID (Arm arch id/revision).
k_npu_off_status	NPU_STATUS (state + fault flags).
k_npu_off_cmd	NPU_CMD (run / clear-irq). [CONFIRM]
k_npu_off_reset	NPU_RESET (software reset). [CONFIRM]
k_npu_off_qbase	QBASE[31:0] (cmd-stream address).
k_npu_off_qsize	QSIZE (cmd-stream length bytes).
k_npu_off_basep0	BASEP0[31:0] (region 0 AXI base).

Definition at line 71 of file board_periph_npu.c.

npu_misc_t

enum npu_misc_t : uint32_t

NPU interrupt event number and this block's report/tick order slot.

k_npu_event_irq mirrors ra8_npu_regs.h k_ra8_npu_event_irq. k_npu_block_order sits between GPIO (10) and the timers (20).

Enumerator
k_npu_event_irq	NPU_IRQ ELC/ICU event (RA8P1 elc_event_t).
k_npu_block_order	Report/tick order slot (relative only).

Definition at line 148 of file board_periph_npu.c.

Function Documentation

internal_npu_apply()

RA8_INTERNAL bool internal_npu_apply ( uc_engine * uc, const npu_cmd_t * c, uint64_t src, uint64_t dst, uint32_t * out_check )

static

Apply the op to the arenas; fold the output into a checkword (bool ok).

Apply the op to the arenas; fold the output into a checkword (bool ok); this step is contained within the board periph npu model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	c	Active controller, card, or command state processed by the operation.
[in]	src	Source storage consumed by the operation.
[in]	dst	Destination storage receiving the result.
[out]	out_check	Destination receiving the out check result.

Returns

The npu apply result produced by the board periph npu model.

Return values

true	The npu apply condition holds or completed successfully; false otherwise.

Precondition

Arguments satisfy the ranges documented for npu apply.

The call executes on the emulator's single owning thread.

Postcondition

State changes remain confined to the board periph npu model and documented output objects.

Ownership of caller-supplied storage is unchanged.

Note

The operation is synchronous and does not transfer heap ownership.

Since

0.1.0

Definition at line 366 of file board_periph_npu.c.

References npu_cmd_t::count, emu_mem_read(), emu_mem_write(), k_npu_chunk_bytes, k_npu_fnv_offset, k_npu_fnv_prime, k_npu_max_chunks, k_ra8_npu_fake_byte_mask, k_ra8_npu_fake_op_addk, npu_cmd_t::konst, npu_cmd_t::op, and RA8_INTERNAL.

Referenced by internal_npu_execute().

internal_npu_block_register()

RA8_INTERNAL void internal_npu_block_register ( void )

static

Register the NPU block before main (host constructor).

Definition at line 618 of file board_periph_npu.c.

References board_periph_register_block(), RA8_INTERNAL, and s_k_npu_block.

internal_npu_console_job()

RA8_INTERNAL void internal_npu_console_job ( const npu_cmd_t * c, uint32_t check )

static

Push one completed-job summary line to the DMA/compute console lane.

Push one completed-job summary line to the dma/compute console lane; this step is contained within the board periph npu model and uses bounded caller or module-owned storage.

Parameters

[in]	c	Active controller, card, or command state processed by the operation.
[in]	check	Check input used by the operation.

Precondition

Arguments satisfy the ranges documented for npu console job.

The call executes on the emulator's single owning thread.

Postcondition

State changes remain confined to the board periph npu model and documented output objects.

Ownership of caller-supplied storage is unchanged.

Note

The operation is synchronous and does not transfer heap ownership.

Since

0.1.0

Definition at line 425 of file board_periph_npu.c.

References board_console_push(), npu_cmd_t::count, npu_cmd_t::dst, internal_npu_op_name(), k_board_console_ch_dma, k_npu_line_cap, npu_cmd_t::op, RA8_INTERNAL, and npu_cmd_t::src.

Referenced by internal_npu_execute().

internal_npu_decode()

RA8_INTERNAL npu_dec_t internal_npu_decode ( uc_engine * uc, npu_cmd_t * out )

static

Decode the submitted command stream at QBASE per ra8_npu_fake_cmd.h.

Decode the submitted command stream at qbase per ra8_npu_fake_cmd.h; this step is contained within the board periph npu model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[out]	out	Destination storage receiving the computed result.

Returns

The npu decode result produced by the board periph npu model.

Return values

value

The operation-specific npu decode value.

Precondition

Arguments satisfy the ranges documented for npu decode.

The call executes on the emulator's single owning thread.

Postcondition

State changes remain confined to the board periph npu model and documented output objects.

Ownership of caller-supplied storage is unchanged.

Note

The operation is synchronous and does not transfer heap ownership.

Since

0.1.0

Definition at line 320 of file board_periph_npu.c.

References npu_cmd_t::count, npu_cmd_t::dst, internal_npu_guest_word(), internal_npu_reg64(), internal_npu_word(), k_npu_dec_bus, k_npu_dec_ok, k_npu_dec_parse, k_npu_off_qbase, k_npu_off_qsize, k_npu_region_count, k_ra8_npu_fake_header_bytes, k_ra8_npu_fake_magic, k_ra8_npu_fake_magic_mask, k_ra8_npu_fake_max_bytes, k_ra8_npu_fake_op_mask, k_ra8_npu_fake_word_const, k_ra8_npu_fake_word_count, k_ra8_npu_fake_word_dst, k_ra8_npu_fake_word_num, k_ra8_npu_fake_word_op, k_ra8_npu_fake_word_src, npu_cmd_t::konst, npu_cmd_t::op, RA8_INTERNAL, s_npu, and npu_cmd_t::src.

Referenced by internal_npu_execute().

internal_npu_execute()

RA8_INTERNAL void internal_npu_execute ( uc_engine * uc )

static

Run one submitted job: decode -> execute -> latch STATUS + IRQ.

Run one submitted job: decode -> execute -> latch status + irq; this step is contained within the board periph npu model and uses bounded caller or module-owned storage.

Parameters

[in,out]

uc

Unicorn engine whose emulated state is read or updated.

Precondition

Arguments satisfy the ranges documented for npu execute.

The call executes on the emulator's single owning thread.

Postcondition

State changes remain confined to the board periph npu model and documented output objects.

Ownership of caller-supplied storage is unchanged.

Note

The operation is synchronous and does not transfer heap ownership.

Since

0.1.0

Definition at line 448 of file board_periph_npu.c.

References board_periph_icu_raise_event(), npu_cmd_t::count, npu_cmd_t::dst, internal_npu_apply(), internal_npu_console_job(), internal_npu_decode(), internal_npu_fault(), internal_npu_region_base(), k_npu_dec_bus, k_npu_dec_ok, k_npu_event_irq, k_npu_status_buserr_bit, k_npu_status_cmdend_bit, k_npu_status_irq_bit, k_npu_status_parse_bit, npu_cmd_t::op, RA8_INTERNAL, s_npu, and npu_cmd_t::src.

Referenced by internal_npu_on_cmd().

internal_npu_fault()

RA8_INTERNAL void internal_npu_fault ( uint32_t status_bit )

static

Latch a STATUS fault bit and stop the engine (honest: no fake done).

Latch a status fault bit and stop the engine (honest: no fake done); this step is contained within the board periph npu model and uses bounded caller or module-owned storage.

Parameters

[in]

status_bit

Status bit input used by the operation.

Precondition

Arguments satisfy the ranges documented for npu fault.

The call executes on the emulator's single owning thread.

Postcondition

State changes remain confined to the board periph npu model and documented output objects.

Ownership of caller-supplied storage is unchanged.

Note

The operation is synchronous and does not transfer heap ownership.

Since

0.1.0

Definition at line 302 of file board_periph_npu.c.

References k_npu_status_irq_bit, RA8_INTERNAL, and s_npu.

Referenced by internal_npu_execute().

internal_npu_guest_word()

RA8_INTERNAL bool internal_npu_guest_word ( uc_engine * uc, uint64_t addr, uint32_t * out )

static

Read one little-endian 32-bit word from guest memory (bool ok).

Read one little-endian 32-bit word from guest memory (bool ok); this step is contained within the board periph npu model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	addr	Guest address involved in the operation.
[out]	out	Destination storage receiving the computed result.

Returns

The npu guest word result produced by the board periph npu model.

Return values

true	The npu guest word condition holds or completed successfully; false otherwise.

Precondition

Arguments satisfy the ranges documented for npu guest word.

The call executes on the emulator's single owning thread.

Postcondition

State changes remain confined to the board periph npu model and documented output objects.

Ownership of caller-supplied storage is unchanged.

Note

The operation is synchronous and does not transfer heap ownership.

Since

0.1.0

Definition at line 277 of file board_periph_npu.c.

References emu_mem_read(), and RA8_INTERNAL.

Referenced by internal_npu_decode().

internal_npu_on_cmd()

RA8_INTERNAL void internal_npu_on_cmd ( uc_engine * uc, uint32_t value )

static

Act on an NPU_CMD write: run kicks a job, clear_irq de-asserts the IRQ.

Act on an npu_cmd write: run kicks a job, clear_irq de-asserts the irq; this step is contained within the board periph npu model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	value	Register or payload value involved in the operation.

Precondition

Arguments satisfy the ranges documented for npu on cmd.

The call executes on the emulator's single owning thread.

Postcondition

State changes remain confined to the board periph npu model and documented output objects.

Ownership of caller-supplied storage is unchanged.

Note

The operation is synchronous and does not transfer heap ownership.

Since

0.1.0

Definition at line 491 of file board_periph_npu.c.

References internal_npu_execute(), k_npu_cmd_clear_irq_bit, k_npu_cmd_run_bit, k_npu_status_irq_bit, RA8_INTERNAL, and s_npu.

Referenced by internal_npu_write().

internal_npu_op_name()

RA8_INTERNAL const char * internal_npu_op_name ( uint32_t op )

static

Human label for a fake opcode (report / console).

Definition at line 404 of file board_periph_npu.c.

References k_ra8_npu_fake_op_addk, k_ra8_npu_fake_op_copy, and RA8_INTERNAL.

Referenced by internal_npu_console_job(), and internal_npu_report().

internal_npu_read()

RA8_INTERNAL uint64_t internal_npu_read ( uc_engine * uc, uint64_t addr, unsigned size )

static

MMIO read inside the NPU window: ID + STATUS are computed, rest shadow.

MMIO read inside the npu window: id + status are computed, rest shadow; this step is contained within the board periph npu model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	addr	Guest address involved in the operation.
[in]	size	Size of the requested region or access in bytes.

Returns

The npu read result produced by the board periph npu model.

Return values

value

The operation-specific npu read value.

Precondition

Arguments satisfy the ranges documented for npu read.

The call executes on the emulator's single owning thread.

Postcondition

State changes remain confined to the board periph npu model and documented output objects.

Ownership of caller-supplied storage is unchanged.

Note

The operation is synchronous and does not transfer heap ownership.

Since

0.1.0

Definition at line 514 of file board_periph_npu.c.

References internal_npu_word(), k_npu_base, k_npu_off_id, k_npu_off_status, k_npu_span, RA8_INTERNAL, s_npu, and s_npu_id.

internal_npu_reg64()

RA8_INTERNAL uint64_t internal_npu_reg64 ( uint64_t lo_off )

static

Assemble the 64-bit value of a lo/hi shadow-register pair.

Assemble the 64-bit value of a lo/hi shadow-register pair; this step is contained within the board periph npu model and uses bounded caller or module-owned storage.

Parameters

[in]

lo_off

Lo off input used by the operation.

Returns

The npu reg64 result produced by the board periph npu model.

Return values

value

The operation-specific npu reg64 value.

Precondition

Arguments satisfy the ranges documented for npu reg64.

The call executes on the emulator's single owning thread.

Postcondition

State changes remain confined to the board periph npu model and documented output objects.

Ownership of caller-supplied storage is unchanged.

Note

The operation is synchronous and does not transfer heap ownership.

Since

0.1.0

Definition at line 239 of file board_periph_npu.c.

References internal_npu_word(), k_npu_addr_hi_pos, k_npu_reg_hi_off, RA8_INTERNAL, and s_npu.

Referenced by internal_npu_decode(), and internal_npu_region_base().

internal_npu_region_base()

RA8_INTERNAL uint64_t internal_npu_region_base ( uint32_t idx )

static

AXI base programmed into BASEPidx (0 if unprogrammed).

Axi base programmed into basepidx (0 if unprogrammed); this step is contained within the board periph npu model and uses bounded caller or module-owned storage.

Parameters

[in]

idx

Bounded index of the selected entry.

Returns

The npu region base result produced by the board periph npu model.

Return values

value

The operation-specific npu region base value.

Precondition

Arguments satisfy the ranges documented for npu region base.

The call executes on the emulator's single owning thread.

Postcondition

State changes remain confined to the board periph npu model and documented output objects.

Ownership of caller-supplied storage is unchanged.

Note

The operation is synchronous and does not transfer heap ownership.

Since

0.1.0

Definition at line 257 of file board_periph_npu.c.

References internal_npu_reg64(), k_npu_basep_stride, k_npu_off_basep0, and RA8_INTERNAL.

Referenced by internal_npu_execute().

internal_npu_report()

RA8_INTERNAL void internal_npu_report ( void )

static

End-of-run NPU section: jobs run + last-result checkword, or touch notice.

End-of-run npu section: jobs run + last-result checkword, or touch notice; this step is contained within the board periph npu model and uses bounded caller or module-owned storage.

Precondition

Arguments satisfy the ranges documented for npu report.

The call executes on the emulator's single owning thread.

Postcondition

State changes remain confined to the board periph npu model and documented output objects.

Ownership of caller-supplied storage is unchanged.

Note

The operation is synchronous and does not transfer heap ownership.

Since

0.1.0

Definition at line 584 of file board_periph_npu.c.

References internal_npu_op_name(), priv_emu_io_errf(), RA8_INTERNAL, and s_npu.

internal_npu_reset()

RA8_INTERNAL void internal_npu_reset ( void )

static

Clear the NPU model to power-on state.

Clear the npu model to power-on state; this step is contained within the board periph npu model and uses bounded caller or module-owned storage.

Precondition

Arguments satisfy the ranges documented for npu reset.

The call executes on the emulator's single owning thread.

Postcondition

State changes remain confined to the board periph npu model and documented output objects.

Ownership of caller-supplied storage is unchanged.

Note

The operation is synchronous and does not transfer heap ownership.

Since

0.1.0

Definition at line 571 of file board_periph_npu.c.

References RA8_INTERNAL, and s_npu.

internal_npu_word()

RA8_INTERNAL uint32_t internal_npu_word ( uint64_t off )

static

Word index of a byte offset inside the shadow store.

Word index of a byte offset inside the shadow store; this step is contained within the board periph npu model and uses bounded caller or module-owned storage.

Parameters

[in]

off

Register or byte offset addressed by the operation.

Returns

The npu word result produced by the board periph npu model.

Return values

value

The operation-specific npu word value.

Precondition

Arguments satisfy the ranges documented for npu word.

The call executes on the emulator's single owning thread.

Postcondition

State changes remain confined to the board periph npu model and documented output objects.

Ownership of caller-supplied storage is unchanged.

Note

The operation is synchronous and does not transfer heap ownership.

Since

0.1.0

Definition at line 223 of file board_periph_npu.c.

References RA8_INTERNAL.

Referenced by internal_npu_decode(), internal_npu_read(), internal_npu_reg64(), and internal_npu_write().

internal_npu_write()

RA8_INTERNAL void internal_npu_write ( uc_engine * uc, uint64_t addr, unsigned size, uint64_t value )

static

MMIO write inside the NPU window: latch, then act on CMD / RESET.

MMIO write inside the npu window: latch, then act on cmd / reset; this step is contained within the board periph npu model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	addr	Guest address involved in the operation.
[in]	size	Size of the requested region or access in bytes.
[in]	value	Register or payload value involved in the operation.

Precondition

Arguments satisfy the ranges documented for npu write.

The call executes on the emulator's single owning thread.

Postcondition

State changes remain confined to the board periph npu model and documented output objects.

Ownership of caller-supplied storage is unchanged.

Note

The operation is synchronous and does not transfer heap ownership.

Since

0.1.0

Definition at line 545 of file board_periph_npu.c.

References internal_npu_on_cmd(), internal_npu_word(), k_npu_base, k_npu_off_cmd, k_npu_off_reset, k_npu_span, and s_npu.

Variable Documentation

s_k_npu_block

const board_periph_block_t s_k_npu_block

static

Initial value:

                                                = {
  .base   = (uint64_t)k_npu_base,
  .span   = (uint64_t)k_npu_span,
  .order  = (uint32_t)k_npu_block_order,
  .read   = internal_npu_read,
  .write  = internal_npu_write,
  .tick   = nullptr,
  .reset  = internal_npu_reset,
  .report = internal_npu_report,
  .name   = "NPU",
  .device = k_board_block_dev_ra8p1,
}

NPU block descriptor (RA8P1-only; self-registered with the core).

Definition at line 604 of file board_periph_npu.c.

Referenced by internal_npu_block_register().

s_npu

npu_state_t s_npu

static

Definition at line 203 of file board_periph_npu.c.

Referenced by internal_npu_decode(), internal_npu_execute(), internal_npu_fault(), internal_npu_on_cmd(), internal_npu_read(), internal_npu_reg64(), internal_npu_report(), internal_npu_reset(), and internal_npu_write().

s_npu_id

const uint32_t s_npu_id

static

Initial value:

                             =
((uint32_t)k_npu_id_arch_major << (uint32_t)k_npu_id_arch_major_pos) |
((uint32_t)k_npu_id_arch_minor << (uint32_t)k_npu_id_arch_minor_pos) |
((uint32_t)k_npu_id_arch_patch << (uint32_t)k_npu_id_arch_patch_pos) |
((uint32_t)k_npu_id_product_u55 << (uint32_t)k_npu_id_product_pos)

Composited Ethos-U55 NPU_ID (arch 1.0.6, product 0 = U55).

[CONFIRM]

Definition at line 206 of file board_periph_npu.c.

Referenced by internal_npu_read().