ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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board_periph_i2c.c File Reference

I3C-in-I2C-mode (IIC_B) controller + GT911 touch + LSM6DSO IMU models plus an external-controller stimulus for the firmware in target mode. More...

#include <stdint.h>
#include <stdio.h>
#include "board_console.h"
#include "board_periph.h"
#include "board_periph_block.h"
#include "board_periph_i2c_internal.h"
#include "emu_host_io_internal.h"
Include dependency graph for board_periph_i2c.c:

Go to the source code of this file.

Data Structures

struct  i3c_state_t
 One I3C-in-I2C-mode channel: register shadow + a transfer state machine. More...
struct  gt911_state_t
 One GoodIX GT911 touch device on the modelled I2C bus. More...
struct  i2c_device_t
 A device on the modelled I2C bus: 7-bit address + read/write callbacks. More...

Enumerations

enum  i3c_map_t : uint64_t {
  k_i3c_base = 0x4035F000UL ,
  k_i3c_span = 0x214UL ,
  k_i3c_off_msdvad = 0x018UL ,
  k_i3c_off_cndctl = 0x140UL ,
  k_i3c_off_ntdtbp0 = 0x158UL ,
  k_i3c_off_bst = 0x1D0UL ,
  k_i3c_off_ntst = 0x1E0UL ,
  k_i3c_off_bcst = 0x210UL ,
  k_i3c_reg_words = 0x214UL / 4UL
}
 I3C-in-I2C-mode (IIC_B) block geometry (ra8_i3c_i2c_regs.h). More...
enum  i3c_cndctl_bit_t : uint32_t {
  k_i3c_cndctl_stcnd = 0x00000001U ,
  k_i3c_cndctl_srcnd = 0x00000002U ,
  k_i3c_cndctl_spcnd = 0x00000004U
}
 CNDCTL condition-request bits (ra8_i3c_i2c_regs.h). More...
enum  i3c_bst_bit_t : uint32_t {
  k_i3c_bst_stcnddf = 0x00000001U ,
  k_i3c_bst_spcnddf = 0x00000002U ,
  k_i3c_bst_nackdf = 0x00000010U ,
  k_i3c_bst_tendf = 0x00000100U ,
  k_i3c_bst_alf = 0x00010000U ,
  k_i3c_bst_todf = 0x00100000U
}
 BST (Bus Status) flags the polling driver observes / clears (W0C). More...
enum  i3c_ntst_bit_t : uint32_t {
  k_i3c_ntst_tdbef0 = 0x00000001U ,
  k_i3c_ntst_rdbff0 = 0x00000002U
}
 NTST (Normal Transfer Status) flags. More...
enum  i3c_bcst_bit_t : uint32_t { k_i3c_bcst_bfref = 0x00000001U }
 BCST (Bus Condition Status) flags. More...
enum  i3c_addr_t : uint32_t {
  k_i3c_addr_shift = 1U ,
  k_i3c_addr_rnw = 0x01U ,
  k_i3c_addr_mask7 = 0x7FU ,
  k_i3c_byte_mask = 0xFFU ,
  k_i3c_dev_rx_max = 64U ,
  k_i3c_dev_max = 4U
}
 I2C address-byte layout on the wire (addr<<1 | R/W). More...
enum  i3c_periph_phase_t : uint8_t {
  k_i3c_periph_idle = 0U ,
  k_i3c_periph_rx_armed = 1U ,
  k_i3c_periph_tx_armed = 2U
}
 Target (peripheral) mode transaction phase. More...
enum  i3c_periph_stim_t : uint32_t {
  k_i3c_periph_seed = 0xA5U ,
  k_i3c_periph_step = 0x11U
}
 Synthetic controller-write byte stream for the target-mode model. More...
enum  gt911_reg_t : uint16_t {
  k_gt911_reg_command = 0x8040U ,
  k_gt911_reg_product = 0x8140U ,
  k_gt911_reg_status = 0x814EU ,
  k_gt911_reg_point0 = 0x814FU
}
 GoodIX GT911 protocol constants (ra8_touch_gt911_regs.h + ra8_touch.c). More...
enum  gt911_const_t : uint32_t {
  k_gt911_addr_7b = 0x5DU ,
  k_gt911_id0 = 0x39U ,
  k_gt911_id1 = 0x31U ,
  k_gt911_id2 = 0x31U ,
  k_gt911_id3 = 0x00U ,
  k_gt911_status_ready = 0x80U ,
  k_gt911_status_one = 0x01U ,
  k_gt911_id_bytes = 4U ,
  k_gt911_point_bytes = 8U ,
  k_gt911_ptr_bytes = 2U ,
  k_gt911_press = 0x20U ,
  k_gt911_seq_max = 8U
}
 GT911 magic byte values + record geometry. More...
enum  gt911_pt_off_t : uint32_t {
  k_gt911_pt_track = 0U ,
  k_gt911_pt_x_lsb = 1U ,
  k_gt911_pt_x_msb = 2U ,
  k_gt911_pt_y_lsb = 3U ,
  k_gt911_pt_y_msb = 4U ,
  k_gt911_pt_sz_lsb = 5U
}
 Byte offsets inside one 8-byte GT911 point record (ra8_touch.c). More...
enum  i2c_console_t : uint32_t { k_i2c_console_line_cap = 48U }
 Console-tap line buffer capacity for an I2C transaction summary. More...

Functions

static i2c_device_tinternal_i2c_device_find (uint8_t addr_7b)
 Find the registered device answering addr_7b, or NULL.
void priv_i2c_device_register (uint8_t addr_7b, void(*wr)(void *, uint8_t), uint32_t(*rd)(void *, uint8_t *, uint32_t), void(*stop)(void *), void *ctx)
 Register a device model in the first free bus slot (drop if full).
void board_periph_touch_inject (uint16_t x, uint16_t y)
 Arm a pending touch contact for the modelled GT911 device.
void board_periph_touch_seq_reset (void)
 Clear the modelled GT911 injected-touch sequence FIFO.
bool board_periph_touch_seq_push (uint16_t x, uint16_t y)
 Queue one raw touch point onto the modelled GT911 injection FIFO.
static void internal_gt911_arm_next_from_seq (gt911_state_t *g)
 Arm the head of the injected sequence FIFO when nothing is pending.
uint32_t board_periph_touch_reported (void)
 Count of touch contacts the firmware has drained from the GT911 model.
bool board_periph_touch_last (uint16_t *x, uint16_t *y)
 Report the coordinates of the most recently drained touch contact.
static void internal_gt911_write (void *ctx, uint8_t byte)
 Controller -> GT911: pointer bytes first (MSB,LSB), then payload.
static uint32_t internal_gt911_read_status (gt911_state_t *g, uint8_t *buf)
 Fill buf with the GT911 status byte for the current frame.
static uint32_t internal_gt911_read_point0 (gt911_state_t *g, uint8_t *buf, uint32_t max)
 Fill buf with one GT911 point0 record for the armed contact.
static uint32_t internal_gt911_read (void *ctx, uint8_t *buf, uint32_t max)
 GT911 -> controller: answer a read at the current register pointer.
static void internal_gt911_stop (void *ctx)
 STOP / transfer end: reset the GT911 pointer-capture state.
static uint32_t internal_i3c_word (uint64_t off)
 Index of the I3C shadow word for off (already range-checked).
static void internal_i3c_open_transfer (void)
 Begin a transaction (START or repeated-START): arm the address phase.
static void internal_i3c_close_transfer (void)
 Close a transaction (STOP): release the bus and notify the device.
static void internal_i3c_address_phase (uint8_t address_byte)
 Consume the address byte after a (re)START: select + ACK a device.
static void internal_i3c_periph_open (uint32_t msdvad)
 Enter / leave target mode when the firmware (re)programmes MSDVAD.
static uint32_t internal_i3c_periph_ntst (void)
 Target-mode NTST: arm a fresh controller write when idle, else reflect.
static uint32_t internal_i3c_periph_rx_read (void)
 Target-mode NTDTBP0 read: hand the firmware the written byte, go to TX.
static void internal_i3c_periph_tx_write (uint8_t byte)
 Target-mode NTDTBP0 write: capture + verify the firmware echo, end xfer.
static void internal_i3c_ntdtbp0_write (uint32_t value)
 Handle a write to NTDTBP0 (address byte, then controller TX payload).
static uint32_t internal_i3c_ntdtbp0_read (void)
 Serve one NTDTBP0 read from the staged device response.
static void internal_i3c_cndctl_write (uint32_t value)
 Dispatch a CNDCTL write -> START / repeated-START / STOP.
static uint64_t internal_i3c_reg_read (uint64_t off)
 Read a register from the modelled I3C/IIC_B channel.
static void internal_i3c_reg_write (uint64_t off, uint32_t value)
 Write a register on the modelled I3C/IIC_B channel.
static uint64_t internal_i3c_read (uc_engine *uc, uint64_t addr, unsigned size)
 MMIO read inside the I3C/IIC_B window.
static void internal_i3c_write (uc_engine *uc, uint64_t addr, unsigned size, uint64_t value)
 MMIO write inside the I3C/IIC_B window.
static void internal_i3c_reset (void)
 Clear the I3C channel + GT911 state and (re)populate the bus.
static void internal_i3c_report (void)
 Print the GT911 touch line when the firmware drained any contact.
static void internal_board_periph_i2c_register (void)
 Self-register the I3C/I2C block before main runs (decentralized).

Variables

static i3c_state_t s_i3c
static i2c_device_t s_i2c_dev [k_i3c_dev_max]
static gt911_state_t s_gt911
static const board_periph_block_t s_k_i3c_block
 This block's descriptor (static lifetime; the core keeps the pointer).

Detailed Description

I3C-in-I2C-mode (IIC_B) controller + GT911 touch + LSM6DSO IMU models plus an external-controller stimulus for the firmware in target mode.

Models the RA8D2 I3C channel 0 driven in legacy I2C mode (PRTS.PRTMD=1) – the IIC_B controller the ra8_i3c_i2c.c polling driver drives – plus the GoodIX GT911 touch controller that answers on the modelled bus, so the firmware's real ra8_touch -> ra8_i3c_transfer -> GT911 path returns touch data without a function-level stub (and the i3c_loopback example drives the same block as a plain I2C controller).

Four cooperating pieces live here:

  1. The IIC_B controller transfer state machine (START / address / write / read / STOP) the driver clocks through CNDCTL / NTDTBP0 / BST / NTST.
  2. A small I2C bus device registry mapping a 7-bit address to read / write / stop callbacks.
  3. The GT911 device: a 16-bit register pointer, the PRODUCT_ID the driver probes, and one armed contact a status + point0 read delivers exactly once.
  4. A target-mode (peripheral) stimulus: when the firmware instead programmes its own MSDVAD address and waits to be addressed (i3c_i2c_peripheral_demo), the model plays the EXTERNAL controller – writing a byte the firmware drains (NTST.RDBFF0) then reading the firmware's one-byte echo (NTST.TDBEF0), so the responder driver is exercised end to end with no wired-up bus. See i3c_periph_phase_t.

Self-registers its descriptor (address range + read / write / reset / report) with the board_periph core from a file-scope constructor.

Since
0.1.0

Definition in file board_periph_i2c.c.

Enumeration Type Documentation

◆ gt911_const_t

enum gt911_const_t : uint32_t

GT911 magic byte values + record geometry.

Enumerator
k_gt911_addr_7b 

EK-RA8D2 carrier GT911 default address.

k_gt911_id0 

'9' – first product-id byte ra8_touch checks.

k_gt911_id1 

'1'.

k_gt911_id2 

'1'.

k_gt911_id3 

NUL terminator.

k_gt911_status_ready 

Buffer-ready (bit 7).

k_gt911_status_one 

One active contact in bits[3:0].

k_gt911_id_bytes 

PRODUCT_ID payload length.

k_gt911_point_bytes 

Bytes per per-point record.

k_gt911_ptr_bytes 

16-bit register-pointer width.

k_gt911_press 

Synthetic contact pressure (size lsb).

k_gt911_seq_max 

Injected raw-point sequence FIFO depth.

Definition at line 151 of file board_periph_i2c.c.

◆ gt911_pt_off_t

enum gt911_pt_off_t : uint32_t

Byte offsets inside one 8-byte GT911 point record (ra8_touch.c).

Enumerator
k_gt911_pt_track 

track_id.

k_gt911_pt_x_lsb 

X low byte.

k_gt911_pt_x_msb 

X high byte.

k_gt911_pt_y_lsb 

Y low byte.

k_gt911_pt_y_msb 

Y high byte.

k_gt911_pt_sz_lsb 

size low (pressure).

Definition at line 167 of file board_periph_i2c.c.

◆ gt911_reg_t

enum gt911_reg_t : uint16_t

GoodIX GT911 protocol constants (ra8_touch_gt911_regs.h + ra8_touch.c).

The GT911 is addressed with a 16-bit big-endian register pointer written first, then read N bytes from that pointer (after a repeated-START). The touch driver reads PRODUCT_ID to confirm the part is alive on open, then each frame reads the STATUS byte (bit7 buffer-ready, bits[3:0] point count) and, when a point is present, the 8-byte POINT[0] record. Writing 0 to STATUS acks the frame. The point record packs x/y little-endian; ra8_touch decodes x at byte 0 and y at byte 2 of the public point type.

Enumerator
k_gt911_reg_command 

Command register (sleep/wake/ack).

k_gt911_reg_product 

4-byte ASCII product id "911\0".

k_gt911_reg_status 

Status: bit7 ready, bits[3:0] count.

k_gt911_reg_point0 

First 8-byte per-point record.

Definition at line 143 of file board_periph_i2c.c.

◆ i2c_console_t

enum i2c_console_t : uint32_t

Console-tap line buffer capacity for an I2C transaction summary.

Enumerator
k_i2c_console_line_cap 

Max chars in an "I2C addr=.. .." line.

Definition at line 553 of file board_periph_i2c.c.

◆ i3c_addr_t

enum i3c_addr_t : uint32_t

I2C address-byte layout on the wire (addr<<1 | R/W).

Enumerator
k_i3c_addr_shift 

7-bit address occupies bits [7:1].

k_i3c_addr_rnw 

LSB: 1 == read, 0 == write.

k_i3c_addr_mask7 

7-bit target-address mask.

k_i3c_byte_mask 

One data byte.

k_i3c_dev_rx_max 

Per-read device response staging cap.

k_i3c_dev_max 

Device-registry capacity on the bus.

Definition at line 97 of file board_periph_i2c.c.

◆ i3c_bcst_bit_t

enum i3c_bcst_bit_t : uint32_t

BCST (Bus Condition Status) flags.

Enumerator
k_i3c_bcst_bfref 

Bus-free flag (bit 0): 1 == idle.

Definition at line 92 of file board_periph_i2c.c.

◆ i3c_bst_bit_t

enum i3c_bst_bit_t : uint32_t

BST (Bus Status) flags the polling driver observes / clears (W0C).

Enumerator
k_i3c_bst_stcnddf 

START-condition detected (bit 0).

k_i3c_bst_spcnddf 

STOP-condition detected (bit 1).

k_i3c_bst_nackdf 

NACK detected (bit 4).

k_i3c_bst_tendf 

Transfer-end / address ACK (bit 8).

k_i3c_bst_alf 

Arbitration lost (bit 16).

k_i3c_bst_todf 

Timeout detected (bit 20).

Definition at line 76 of file board_periph_i2c.c.

◆ i3c_cndctl_bit_t

enum i3c_cndctl_bit_t : uint32_t

CNDCTL condition-request bits (ra8_i3c_i2c_regs.h).

Enumerator
k_i3c_cndctl_stcnd 

STCND issue START.

k_i3c_cndctl_srcnd 

SRCND issue repeated-START.

k_i3c_cndctl_spcnd 

SPCND issue STOP.

Definition at line 69 of file board_periph_i2c.c.

◆ i3c_map_t

enum i3c_map_t : uint64_t

I3C-in-I2C-mode (IIC_B) block geometry (ra8_i3c_i2c_regs.h).

The RA8D2 has one I3C channel at 0x4035F000. ra8_touch drives the GoodIX GT911 touch controller through this peripheral in legacy I2C mode (PRTS.PRTMD=1), and the i3c_loopback example drives the same block as an I2C controller. The polling driver (libs/ra8_hal/src/ra8_i3c_i2c.c) only touches the registers named here; everything else in the window reflects writes via the shadow. Offsets match the r_i3c_i2c_regs_t struct in ra8_i3c_i2c_regs.h.

Enumerator
k_i3c_base 

I3C0 base (== IIC_B channel 0).

k_i3c_span 

Through BCST at +0x210.

k_i3c_off_msdvad 

MSDVAD own/target device address.

k_i3c_off_cndctl 

CNDCTL START/RESTART/STOP request.

k_i3c_off_ntdtbp0 

NTDTBP0 transfer data buffer port.

k_i3c_off_bst 

BST bus status (W0C flags).

k_i3c_off_ntst 

NTST normal-transfer status.

k_i3c_off_bcst 

BCST bus condition status (BFREF).

k_i3c_reg_words 

Shadow word count for the window.

Definition at line 56 of file board_periph_i2c.c.

◆ i3c_ntst_bit_t

enum i3c_ntst_bit_t : uint32_t

NTST (Normal Transfer Status) flags.

Enumerator
k_i3c_ntst_tdbef0 

TX data-buffer empty (bit 0).

k_i3c_ntst_rdbff0 

RX data-buffer full (bit 1).

Definition at line 86 of file board_periph_i2c.c.

◆ i3c_periph_phase_t

enum i3c_periph_phase_t : uint8_t

Target (peripheral) mode transaction phase.

When the firmware brings IIC_B up as an addressed TARGET (it programmes its own address into MSDVAD and never issues a controller START via CNDCTL), the model plays the role of the EXTERNAL controller driving it. Each synthetic transaction is a controller write (the firmware sees NTST.RDBFF0 and drains a byte) followed by a controller read (the firmware sees NTST.TDBEF0 and pushes its one-byte echo). The phase advances on the firmware's own NTDTBP0 accesses, so the handshake is paced by the firmware's polling loop – exactly as a real controller's clocking would pace it.

Enumerator
k_i3c_periph_idle 

No target transaction armed.

k_i3c_periph_rx_armed 

Controller wrote a byte: RDBFF0 raised.

k_i3c_periph_tx_armed 

Controller is reading: TDBEF0 raised.

Definition at line 119 of file board_periph_i2c.c.

◆ i3c_periph_stim_t

enum i3c_periph_stim_t : uint32_t

Synthetic controller-write byte stream for the target-mode model.

Enumerator
k_i3c_periph_seed 

First byte the external controller writes.

k_i3c_periph_step 

Per-transaction increment of that byte.

Definition at line 126 of file board_periph_i2c.c.

Function Documentation

◆ board_periph_touch_inject()

void board_periph_touch_inject ( uint16_t x,
uint16_t y )

Arm a pending touch contact for the modelled GT911 device.

ra8_emulator turns a --click argument or a live board_view mouse-down into a single pending contact here. The contact is answered through the REAL firmware path: ra8_touch_read issues a GT911 status read over ra8_i3c_transfer (the I3C peripheral in legacy I2C mode), and the modelled GT911 device – registered on the modelled I3C/I2C bus at its 7-bit address – reports a status byte with one point plus a point0 record carrying x / y. The contact is one-shot: once the firmware reads the point record it is cleared and board_periph_touch_reported is incremented, so the next frame reads "no frame ready" exactly as the real controller would after a tap is drained. There is no function-level touch hook; the firmware's ra8_touch -> I3C -> GT911 code runs unchanged.

Parameters
[in]xPanel X coordinate of the contact (GT911-native units).
[in]yPanel Y coordinate of the contact.
Returns
Nothing.
Postcondition
The next GT911 status read reports a buffer-ready frame with one point.
Since
0.1.0
Precondition
Arguments satisfy the ranges documented for board periph touch inject.
The call executes on the emulator's single owning thread.
Postcondition
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.

Definition at line 304 of file board_periph_i2c.c.

References s_gt911.

Referenced by internal_run_loop_tick_inputs(), and route_click().

◆ board_periph_touch_last()

bool board_periph_touch_last ( uint16_t * x,
uint16_t * y )

Report the coordinates of the most recently drained touch contact.

Read-only accessor over the GT911 model's last-reported point, so the board view can show "touch x,y" for the last tap the firmware drained through the real ra8_touch -> I3C -> GT911 path. Writes nothing when no contact has been reported yet.

Parameters
[out]xReceives the last contact's X coordinate (unchanged if none).
[out]yReceives the last contact's Y coordinate (unchanged if none).
Returns
true if at least one contact has been drained (and x / y were written), false otherwise.
Since
0.1.0
Return values
trueThe board periph touch last condition holds or completed successfully; false otherwise.
Precondition
Arguments satisfy the ranges documented for board periph touch last.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.

Definition at line 353 of file board_periph_i2c.c.

References s_gt911.

Referenced by internal_fill_status_hw().

◆ board_periph_touch_reported()

uint32_t board_periph_touch_reported ( void )

Count of touch contacts the firmware has drained from the GT911 model.

Incremented each time the firmware reads the GT911 point0 record for an armed contact (i.e. a real ra8_touch_read -> I3C -> GT911 point fetch completed). The run loop uses this – instead of a stub-side counter – to know a headless --click has flowed all the way through the real touch path before it drains the post-click settle window.

Returns
Number of contacts reported through the modelled GT911.
Since
0.1.0
Return values
valueThe operation-specific board periph touch reported value.
Precondition
Arguments satisfy the ranges documented for board periph touch reported.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.

Definition at line 348 of file board_periph_i2c.c.

References s_gt911.

Referenced by internal_run_loop_click_tail(), internal_run_loop_tick_inputs(), and internal_run_print_stop_summary().

◆ board_periph_touch_seq_push()

bool board_periph_touch_seq_push ( uint16_t x,
uint16_t y )

Queue one raw touch point onto the modelled GT911 injection FIFO.

Appends (x, y) to the sequence the GT911 model serves one point per drained frame (see board_periph_touch_seq_reset). While the FIFO is non-empty every GT911 status read reports a buffer-ready frame with one contact, and the matching point0 read returns the head point and advances the queue – exactly as a real GT911 latches the next physical touch after the controller drains and acks the current one. Points are consumed in push order, so callers push them in the same order the firmware presents targets.

Parameters
[in]xPanel X coordinate of the queued contact (GT911-native units).
[in]yPanel Y coordinate of the queued contact.
Returns
true if the point was queued; false if the FIFO is full.
Postcondition
On true the queued depth grows by one.
Since
0.1.0
Return values
trueThe board periph touch seq push condition holds or completed successfully; false otherwise.
Precondition
Arguments satisfy the ranges documented for board periph touch seq push.
The call executes on the emulator's single owning thread.
Postcondition
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.

Definition at line 318 of file board_periph_i2c.c.

References k_gt911_seq_max, and s_gt911.

Referenced by internal_main_arm_touch_seq().

◆ board_periph_touch_seq_reset()

void board_periph_touch_seq_reset ( void )

Clear the modelled GT911 injected-touch sequence FIFO.

The FIFO is the multi-tap analogue of board_periph_touch_inject: instead of one re-armed contact it queues a SEQUENCE of distinct raw points, delivering the next queued point on each ra8_touch_read frame the firmware drains. It exists so an interactive N-point flow – e.g. the touch-calibration example (touch_cal, #262), which must collect one raw sample per on-screen target – can run headless in ra8_emulator: on silicon a human taps N cross-hairs; in EIL the CLI (--touch-seq, board_periph_touch_seq_push) supplies N synthetic raw taps that return through the genuine ra8_touch_read decode. Resetting empties the queue and drops any point armed from it.

Returns
Nothing.
Postcondition
The sequence FIFO is empty; the next status read reports "no frame".
Since
0.1.0
Precondition
Arguments satisfy the ranges documented for board periph touch seq reset.
The call executes on the emulator's single owning thread.
Postcondition
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.

Definition at line 311 of file board_periph_i2c.c.

References s_gt911.

Referenced by internal_main_arm_touch_seq().

◆ internal_board_periph_i2c_register()

void internal_board_periph_i2c_register ( void )
static

Self-register the I3C/I2C block before main runs (decentralized).

Definition at line 973 of file board_periph_i2c.c.

References board_periph_register_block(), RA8_INTERNAL, and s_k_i3c_block.

◆ internal_gt911_arm_next_from_seq()

void internal_gt911_arm_next_from_seq ( gt911_state_t * g)
static

Arm the head of the injected sequence FIFO when nothing is pending.

Arm the head of the injected sequence fifo when nothing is pending; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Parameters
[in,out]gG state or storage updated in place by the operation.
Precondition
Arguments satisfy the ranges documented for gt911 arm next from seq.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 338 of file board_periph_i2c.c.

References gt911_state_t::click_pending, gt911_state_t::click_x, gt911_state_t::click_y, RA8_INTERNAL, gt911_state_t::seq_len, gt911_state_t::seq_pos, gt911_state_t::seq_x, and gt911_state_t::seq_y.

Referenced by internal_gt911_read_status().

◆ internal_gt911_read()

uint32_t internal_gt911_read ( void * ctx,
uint8_t * buf,
uint32_t max )
static

GT911 -> controller: answer a read at the current register pointer.

Gt911 -> controller: answer a read at the current register pointer; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Parameters
[in,out]ctxOpaque callback context identifying module-owned device state.
[in,out]bufBounded byte buffer read or updated by the operation.
[in]maxCapacity of the destination or operation in elements.
Returns
The gt911 read result produced by the board periph I2C model.
Return values
valueThe operation-specific gt911 read value.
Precondition
Arguments satisfy the ranges documented for gt911 read.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 464 of file board_periph_i2c.c.

References internal_gt911_read_point0(), internal_gt911_read_status(), k_gt911_id0, k_gt911_id1, k_gt911_id2, k_gt911_id3, k_gt911_id_bytes, k_gt911_reg_point0, k_gt911_reg_product, k_gt911_reg_status, RA8_INTERNAL, and gt911_state_t::reg_ptr.

◆ internal_gt911_read_point0()

uint32_t internal_gt911_read_point0 ( gt911_state_t * g,
uint8_t * buf,
uint32_t max )
static

Fill buf with one GT911 point0 record for the armed contact.

Fill buf with one gt911 point0 record for the armed contact; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Parameters
[in,out]gG state or storage updated in place by the operation.
[in,out]bufBounded byte buffer read or updated by the operation.
[in]maxCapacity of the destination or operation in elements.
Returns
The gt911 read point0 result produced by the board periph I2C model.
Return values
valueThe operation-specific gt911 read point0 value.
Precondition
Arguments satisfy the ranges documented for gt911 read point0.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 429 of file board_periph_i2c.c.

References gt911_state_t::click_pending, gt911_state_t::click_x, gt911_state_t::click_y, k_gt911_point_bytes, k_gt911_press, k_gt911_pt_sz_lsb, k_gt911_pt_track, k_gt911_pt_x_lsb, k_gt911_pt_x_msb, k_gt911_pt_y_lsb, k_gt911_pt_y_msb, k_i3c_byte_mask, and gt911_state_t::reported.

Referenced by internal_gt911_read().

◆ internal_gt911_read_status()

uint32_t internal_gt911_read_status ( gt911_state_t * g,
uint8_t * buf )
static

Fill buf with the GT911 status byte for the current frame.

Fill buf with the gt911 status byte for the current frame; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Parameters
[in,out]gG state or storage updated in place by the operation.
[in,out]bufBounded byte buffer read or updated by the operation.
Returns
The gt911 read status result produced by the board periph I2C model.
Return values
valueThe operation-specific gt911 read status value.
Precondition
Arguments satisfy the ranges documented for gt911 read status.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 404 of file board_periph_i2c.c.

References gt911_state_t::click_pending, internal_gt911_arm_next_from_seq(), k_gt911_status_one, k_gt911_status_ready, and RA8_INTERNAL.

Referenced by internal_gt911_read().

◆ internal_gt911_stop()

void internal_gt911_stop ( void * ctx)
static

STOP / transfer end: reset the GT911 pointer-capture state.

Stop / transfer end: reset the gt911 pointer-capture state; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Parameters
[in,out]ctxOpaque callback context identifying module-owned device state.
Precondition
Arguments satisfy the ranges documented for gt911 stop.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 496 of file board_periph_i2c.c.

References gt911_state_t::ptr_bytes, and RA8_INTERNAL.

Referenced by internal_i3c_reset().

◆ internal_gt911_write()

void internal_gt911_write ( void * ctx,
uint8_t byte )
static

Controller -> GT911: pointer bytes first (MSB,LSB), then payload.

Controller -> gt911: pointer bytes first (msb,lsb), then payload; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Parameters
[in,out]ctxOpaque callback context identifying module-owned device state.
[in]byteOne data byte received from or sent to the emulated interface.
Precondition
Arguments satisfy the ranges documented for gt911 write.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 373 of file board_periph_i2c.c.

References gt911_state_t::click_pending, k_gt911_ptr_bytes, k_gt911_reg_command, k_gt911_reg_status, gt911_state_t::ptr_bytes, RA8_INTERNAL, and gt911_state_t::reg_ptr.

Referenced by internal_i3c_reset().

◆ internal_i2c_device_find()

i2c_device_t * internal_i2c_device_find ( uint8_t addr_7b)
static

Find the registered device answering addr_7b, or NULL.

Definition at line 269 of file board_periph_i2c.c.

References k_i3c_dev_max, RA8_INTERNAL, and s_i2c_dev.

Referenced by internal_i3c_address_phase(), internal_i3c_close_transfer(), and internal_i3c_ntdtbp0_write().

◆ internal_i3c_address_phase()

void internal_i3c_address_phase ( uint8_t address_byte)
static

Consume the address byte after a (re)START: select + ACK a device.

Consume the address byte after a (re)start: select + ack a device; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Parameters
[in]address_byteAddress byte input used by the operation.
Precondition
Arguments satisfy the ranges documented for I3C address phase.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 602 of file board_periph_i2c.c.

References i2c_device_t::ctx, internal_i2c_device_find(), k_i3c_addr_mask7, k_i3c_addr_rnw, k_i3c_addr_shift, k_i3c_bst_nackdf, k_i3c_bst_tendf, k_i3c_dev_rx_max, k_i3c_ntst_rdbff0, k_i3c_ntst_tdbef0, RA8_INTERNAL, i2c_device_t::read, and s_i3c.

Referenced by internal_i3c_ntdtbp0_write().

◆ internal_i3c_close_transfer()

void internal_i3c_close_transfer ( void )
static

Close a transaction (STOP): release the bus and notify the device.

Close a transaction (stop): release the bus and notify the device; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Precondition
Arguments satisfy the ranges documented for I3C close transfer.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 565 of file board_periph_i2c.c.

References board_console_push(), i2c_device_t::ctx, internal_i2c_device_find(), k_board_console_ch_i2c, k_i2c_console_line_cap, k_i3c_ntst_tdbef0, RA8_INTERNAL, s_i3c, and i2c_device_t::stop.

Referenced by internal_i3c_cndctl_write().

◆ internal_i3c_cndctl_write()

void internal_i3c_cndctl_write ( uint32_t value)
static

Dispatch a CNDCTL write -> START / repeated-START / STOP.

Dispatch a cndctl write -> start / repeated-start / stop; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Parameters
[in]valueRegister or payload value involved in the operation.
Precondition
Arguments satisfy the ranges documented for I3C cndctl write.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 786 of file board_periph_i2c.c.

References internal_i3c_close_transfer(), internal_i3c_open_transfer(), k_i3c_cndctl_spcnd, k_i3c_cndctl_srcnd, k_i3c_cndctl_stcnd, and RA8_INTERNAL.

Referenced by internal_i3c_reg_write().

◆ internal_i3c_ntdtbp0_read()

uint32_t internal_i3c_ntdtbp0_read ( void )
static

Serve one NTDTBP0 read from the staged device response.

Serve one ntdtbp0 read from the staged device response; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Returns
The I3C ntdtbp0 read result produced by the board periph I2C model.
Return values
valueThe operation-specific I3C ntdtbp0 read value.
Precondition
Arguments satisfy the ranges documented for I3C ntdtbp0 read.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 757 of file board_periph_i2c.c.

References internal_i3c_periph_rx_read(), k_i3c_ntst_rdbff0, RA8_INTERNAL, and s_i3c.

Referenced by internal_i3c_reg_read().

◆ internal_i3c_ntdtbp0_write()

void internal_i3c_ntdtbp0_write ( uint32_t value)
static

Handle a write to NTDTBP0 (address byte, then controller TX payload).

Handle a write to ntdtbp0 (address byte, then controller tx payload); this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Parameters
[in]valueRegister or payload value involved in the operation.
Precondition
Arguments satisfy the ranges documented for I3C ntdtbp0 write.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 725 of file board_periph_i2c.c.

References i2c_device_t::ctx, internal_i2c_device_find(), internal_i3c_address_phase(), internal_i3c_periph_tx_write(), k_i3c_byte_mask, k_i3c_ntst_tdbef0, RA8_INTERNAL, s_i3c, and i2c_device_t::write.

Referenced by internal_i3c_reg_write().

◆ internal_i3c_open_transfer()

void internal_i3c_open_transfer ( void )
static

Begin a transaction (START or repeated-START): arm the address phase.

Begin a transaction (start or repeated-start): arm the address phase; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Precondition
Arguments satisfy the ranges documented for I3C open transfer.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 537 of file board_periph_i2c.c.

References k_i3c_bst_nackdf, k_i3c_bst_tendf, k_i3c_ntst_tdbef0, RA8_INTERNAL, and s_i3c.

Referenced by internal_i3c_cndctl_write().

◆ internal_i3c_periph_ntst()

uint32_t internal_i3c_periph_ntst ( void )
static

Target-mode NTST: arm a fresh controller write when idle, else reflect.

A new transaction starts on the firmware's first status poll after the previous one completes: the synthetic controller "writes" a byte (NTST.RDBFF0 raised) that rotates per transaction, so the firmware's echo-back is a meaningful round-trip rather than a fixed constant. *

Returns
The I3C periph ntst result produced by the board periph I2C model.
Return values
valueThe operation-specific I3C periph ntst value.
Precondition
Arguments satisfy the ranges documented for I3C periph ntst.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 668 of file board_periph_i2c.c.

References k_i3c_byte_mask, k_i3c_ntst_rdbff0, k_i3c_ntst_tdbef0, k_i3c_periph_idle, k_i3c_periph_rx_armed, k_i3c_periph_seed, k_i3c_periph_step, RA8_INTERNAL, and s_i3c.

Referenced by internal_i3c_reg_read().

◆ internal_i3c_periph_open()

void internal_i3c_periph_open ( uint32_t msdvad)
static

Enter / leave target mode when the firmware (re)programmes MSDVAD.

Enter / leave target mode when the firmware (re)programmes msdvad; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Parameters
[in]msdvadMsdvad input used by the operation.
Precondition
Arguments satisfy the ranges documented for I3C periph open.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 647 of file board_periph_i2c.c.

References k_i3c_addr_mask7, k_i3c_addr_shift, k_i3c_periph_idle, RA8_INTERNAL, and s_i3c.

Referenced by internal_i3c_reg_write().

◆ internal_i3c_periph_rx_read()

uint32_t internal_i3c_periph_rx_read ( void )
static

Target-mode NTDTBP0 read: hand the firmware the written byte, go to TX.

Target-mode ntdtbp0 read: hand the firmware the written byte, go to tx; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Returns
The I3C periph rx read result produced by the board periph I2C model.
Return values
valueThe operation-specific I3C periph rx read value.
Precondition
Arguments satisfy the ranges documented for I3C periph rx read.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 692 of file board_periph_i2c.c.

References k_i3c_periph_tx_armed, RA8_INTERNAL, and s_i3c.

Referenced by internal_i3c_ntdtbp0_read().

◆ internal_i3c_periph_tx_write()

void internal_i3c_periph_tx_write ( uint8_t byte)
static

Target-mode NTDTBP0 write: capture + verify the firmware echo, end xfer.

Target-mode ntdtbp0 write: capture + verify the firmware echo, end xfer; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Parameters
[in]byteOne data byte received from or sent to the emulated interface.
Precondition
Arguments satisfy the ranges documented for I3C periph tx write.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 707 of file board_periph_i2c.c.

References k_i3c_periph_idle, RA8_INTERNAL, and s_i3c.

Referenced by internal_i3c_ntdtbp0_write().

◆ internal_i3c_read()

uint64_t internal_i3c_read ( uc_engine * uc,
uint64_t addr,
unsigned size )
static

MMIO read inside the I3C/IIC_B window.

MMIO read inside the i3c/iic_b window; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Parameters
[in,out]ucUnicorn engine whose emulated state is read or updated.
[in]addrGuest address involved in the operation.
[in]sizeSize of the requested region or access in bytes.
Returns
The I3C read result produced by the board periph I2C model.
Return values
valueThe operation-specific I3C read value.
Precondition
Arguments satisfy the ranges documented for I3C read.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 869 of file board_periph_i2c.c.

References internal_i3c_reg_read(), k_i3c_base, and RA8_INTERNAL.

◆ internal_i3c_reg_read()

uint64_t internal_i3c_reg_read ( uint64_t off)
static

Read a register from the modelled I3C/IIC_B channel.

Read a register from the modelled i3c/iic_b channel; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Parameters
[in]offRegister or byte offset addressed by the operation.
Returns
The I3C reg read result produced by the board periph I2C model.
Return values
valueThe operation-specific I3C reg read value.
Precondition
Arguments satisfy the ranges documented for I3C reg read.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 806 of file board_periph_i2c.c.

References internal_i3c_ntdtbp0_read(), internal_i3c_periph_ntst(), internal_i3c_word(), k_i3c_bcst_bfref, k_i3c_off_bcst, k_i3c_off_bst, k_i3c_off_ntdtbp0, k_i3c_off_ntst, RA8_INTERNAL, and s_i3c.

Referenced by internal_i3c_read().

◆ internal_i3c_reg_write()

void internal_i3c_reg_write ( uint64_t off,
uint32_t value )
static

Write a register on the modelled I3C/IIC_B channel.

Write a register on the modelled i3c/iic_b channel; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Parameters
[in]offRegister or byte offset addressed by the operation.
[in]valueRegister or payload value involved in the operation.
Precondition
Arguments satisfy the ranges documented for I3C reg write.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 837 of file board_periph_i2c.c.

References internal_i3c_cndctl_write(), internal_i3c_ntdtbp0_write(), internal_i3c_periph_open(), internal_i3c_word(), k_i3c_off_bst, k_i3c_off_cndctl, k_i3c_off_msdvad, k_i3c_off_ntdtbp0, RA8_INTERNAL, and s_i3c.

Referenced by internal_i3c_write().

◆ internal_i3c_report()

void internal_i3c_report ( void )
static

Print the GT911 touch line when the firmware drained any contact.

Print the gt911 touch line when the firmware drained any contact; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Precondition
Arguments satisfy the ranges documented for I3C report.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 935 of file board_periph_i2c.c.

References priv_board_i2c_imu_reads(), priv_emu_io_errf(), RA8_INTERNAL, s_gt911, and s_i3c.

◆ internal_i3c_reset()

void internal_i3c_reset ( void )
static

Clear the I3C channel + GT911 state and (re)populate the bus.

Clear the i3c channel + gt911 state and (re)populate the bus; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Precondition
Arguments satisfy the ranges documented for I3C reset.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 904 of file board_periph_i2c.c.

References internal_gt911_read(), internal_gt911_stop(), internal_gt911_write(), k_gt911_addr_7b, k_i3c_dev_max, priv_board_i2c_imu_fuel_register(), priv_board_i2c_imu_fuel_reset(), priv_i2c_device_register(), RA8_INTERNAL, s_gt911, s_i2c_dev, and s_i3c.

◆ internal_i3c_word()

uint32_t internal_i3c_word ( uint64_t off)
static

Index of the I3C shadow word for off (already range-checked).

Index of the i3c shadow word for off (already range-checked); this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Parameters
[in]offRegister or byte offset addressed by the operation.
Returns
The I3C word result produced by the board periph I2C model.
Return values
valueThe operation-specific I3C word value.
Precondition
Arguments satisfy the ranges documented for I3C word.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 524 of file board_periph_i2c.c.

References RA8_INTERNAL.

Referenced by internal_i3c_reg_read(), and internal_i3c_reg_write().

◆ internal_i3c_write()

void internal_i3c_write ( uc_engine * uc,
uint64_t addr,
unsigned size,
uint64_t value )
static

MMIO write inside the I3C/IIC_B window.

MMIO write inside the i3c/iic_b window; this step is contained within the board periph I2C model and uses bounded caller or module-owned storage.

Parameters
[in,out]ucUnicorn engine whose emulated state is read or updated.
[in]addrGuest address involved in the operation.
[in]sizeSize of the requested region or access in bytes.
[in]valueRegister or payload value involved in the operation.
Precondition
Arguments satisfy the ranges documented for I3C write.
The call executes on the emulator's single owning thread.
Postcondition
State changes remain confined to the board periph I2C model and documented output objects.
Ownership of caller-supplied storage is unchanged.
Note
The operation is synchronous and does not transfer heap ownership.
Since
0.1.0

Definition at line 889 of file board_periph_i2c.c.

References internal_i3c_reg_write(), and k_i3c_base.

◆ priv_i2c_device_register()

void priv_i2c_device_register ( uint8_t addr_7b,
void(* wr )(void *, uint8_t),
uint32_t(* rd )(void *, uint8_t *, uint32_t),
void(* stop )(void *),
void * ctx )

Register a device model in the first free bus slot (drop if full).

Parameters
[in]addr_7b7-bit I2C address the device answers.
[in]wrWrite-phase byte sink (register pointer / config).
[in]rdRead-phase burst source.
[in]stopSTOP-condition notification.
[in]ctxDevice state handed back to every callback.
Returns
Nothing.
Precondition
The registry has a free slot (drops silently when full).
The callbacks and ctx outlive the run.
Postcondition
The device answers address phases at addr_7b.
Note
Not thread-safe; call from reset/registration paths only.
Since
0.1.0

Definition at line 280 of file board_periph_i2c.c.

References k_i3c_dev_max, and s_i2c_dev.

Referenced by internal_i3c_reset(), and priv_board_i2c_imu_fuel_register().

Variable Documentation

◆ s_gt911

◆ s_i2c_dev

◆ s_i3c

◆ s_k_i3c_block

const board_periph_block_t s_k_i3c_block
static
Initial value:
= {
.base = (uint64_t)k_i3c_base,
.span = (uint64_t)k_i3c_span,
.order = (uint32_t)k_block_order_i2c,
.tick = nullptr,
.name = "I3C/I2C+GT911",
}
@ k_block_order_i2c
I3C/I2C + GT911 (no tick today).
static void internal_i3c_write(uc_engine *uc, uint64_t addr, unsigned size, uint64_t value)
MMIO write inside the I3C/IIC_B window.
static void internal_i3c_reset(void)
Clear the I3C channel + GT911 state and (re)populate the bus.
@ k_i3c_span
Through BCST at +0x210.
@ k_i3c_base
I3C0 base (== IIC_B channel 0).
static void internal_i3c_report(void)
Print the GT911 touch line when the firmware drained any contact.
static uint64_t internal_i3c_read(uc_engine *uc, uint64_t addr, unsigned size)
MMIO read inside the I3C/IIC_B window.
-proof

This block's descriptor (static lifetime; the core keeps the pointer).

Definition at line 960 of file board_periph_i2c.c.

Referenced by internal_board_periph_i2c_register().