One I3C-in-I2C-mode channel: register shadow + a transfer state machine. More...

Data Fields
uint32_t	reg [k_i3c_reg_words]
	Reflect-on-read register shadow.
bool	busy
	True between START and STOP.
bool	addr_done
	Address phase of the current (re)START done.
bool	acked
	The addressed target ACKed.
bool	reading
	Current transfer direction is read.
uint8_t	target_7b
	7-bit address selected this transfer.
uint32_t	ntst
	NTST flags (TDBEF0 / RDBFF0).
uint32_t	bst
	BST flags (NACKDF / TENDF / ...).
uint8_t	rx [k_i3c_dev_rx_max]
	Staged device response for a read.
uint32_t	rx_len
	Valid bytes in `rx`.
uint32_t	rx_pos
	Next byte index served from `rx`.
bool	rx_primed
	The FSP dummy first read was consumed.
bool	periph_mode
	IIC_B opened as an addressed target (MSDVAD set).
uint8_t	periph_addr_7b
	Own 7-bit address the firmware claimed in MSDVAD.
uint8_t	periph_phase
	i3c_periph_phase_t – target-xfer position.
uint8_t	periph_rx_byte
	Synthetic controller-write byte for this xfer.
uint32_t	periph_xfers
	Completed controller write+read target xfers.
bool	periph_echo_bad
	A firmware echo did not match the written byte.

Detailed Description

One I3C-in-I2C-mode channel: register shadow + a transfer state machine.

The model owns the registers the IIC_B polling driver actually touches; the rest of the window reflects writes through reg. The transfer fields track one controller transaction: busy spans START..STOP (BCST.BFREF reports the complement), addr_done latches once the address byte after a (re)START has selected a device, target_7b / reading record that selection, and the rx staging buffer holds the bytes the addressed device produced for the current read (drained one per NTDTBP0 read, after the FSP "dummy" first read).

Definition at line 188 of file board_periph_i2c.c.

Field Documentation

◆ acked

bool i3c_state_t::acked

The addressed target ACKed.

Definition at line 192 of file board_periph_i2c.c.

◆ addr_done

bool i3c_state_t::addr_done

Address phase of the current (re)START done.

Definition at line 191 of file board_periph_i2c.c.

◆ bst

uint32_t i3c_state_t::bst

BST flags (NACKDF / TENDF / ...).

Definition at line 196 of file board_periph_i2c.c.

◆ busy

bool i3c_state_t::busy

True between START and STOP.

Definition at line 190 of file board_periph_i2c.c.

◆ ntst

uint32_t i3c_state_t::ntst

NTST flags (TDBEF0 / RDBFF0).

Definition at line 195 of file board_periph_i2c.c.

◆ periph_addr_7b

uint8_t i3c_state_t::periph_addr_7b

Own 7-bit address the firmware claimed in MSDVAD.

Definition at line 203 of file board_periph_i2c.c.

◆ periph_echo_bad

bool i3c_state_t::periph_echo_bad

A firmware echo did not match the written byte.

Definition at line 207 of file board_periph_i2c.c.

◆ periph_mode

bool i3c_state_t::periph_mode

IIC_B opened as an addressed target (MSDVAD set).

Definition at line 202 of file board_periph_i2c.c.

◆ periph_phase

uint8_t i3c_state_t::periph_phase

i3c_periph_phase_t – target-xfer position.

Definition at line 204 of file board_periph_i2c.c.

◆ periph_rx_byte

uint8_t i3c_state_t::periph_rx_byte

Synthetic controller-write byte for this xfer.

Definition at line 205 of file board_periph_i2c.c.

◆ periph_xfers

uint32_t i3c_state_t::periph_xfers

Completed controller write+read target xfers.

Definition at line 206 of file board_periph_i2c.c.

◆ reading

bool i3c_state_t::reading

Current transfer direction is read.

Definition at line 193 of file board_periph_i2c.c.

◆ reg

uint32_t i3c_state_t::reg[k_i3c_reg_words]

Reflect-on-read register shadow.

Definition at line 189 of file board_periph_i2c.c.

◆ rx

uint8_t i3c_state_t::rx[k_i3c_dev_rx_max]

Staged device response for a read.

Definition at line 197 of file board_periph_i2c.c.

◆ rx_len

uint32_t i3c_state_t::rx_len

Valid bytes in rx.

Definition at line 198 of file board_periph_i2c.c.

◆ rx_pos

uint32_t i3c_state_t::rx_pos

Next byte index served from rx.

Definition at line 199 of file board_periph_i2c.c.

◆ rx_primed

bool i3c_state_t::rx_primed

The FSP dummy first read was consumed.

Definition at line 200 of file board_periph_i2c.c.

◆ target_7b

uint8_t i3c_state_t::target_7b

7-bit address selected this transfer.

Definition at line 194 of file board_periph_i2c.c.

The documentation for this struct was generated from the following file:

tools/ra8_emulator/src/periph/board_periph_i2c.c

Data Fields