ux_dcd_ra8_usb_xfer.c

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#define UX_SOURCE_CODE
 
#include <stdint.h>
#include <string.h>
 
#include "ra8_check.h"
#include "ra8_elc_regs.h"
#include "ra8_isr.h"
#include "ra8_log.h"
#include "ra8_usb_regs.h"
#include "tx_api.h"
#include "ux_api.h"
#include "ux_dcd_ra8_usb.h"
#include "ux_dcd_ra8_usb_internal.h"
#include "ux_device_stack.h"
#include "ux_system.h"
#include "ux_utility.h"
 
uint8_t g_orphan_buf[k_ra8_usb_orphan_bytes]; 
 
uint16_t g_orphan_len = 0U; 
 
uint8_t g_orphan_pipe = 0U; 
 
/* -------------------------------------------------------------------------- */
/* Internal helpers */
/* -------------------------------------------------------------------------- */

uint8_t priv_ep_to_pipe(uint8_t ep_addr)
{
  const uint8_t ep = ep_addr & (uint8_t)k_ra8_usb_ep_addr_num_mask;
  if (ep == 0U) {
    return 0U;
  }
  if (ep < (uint8_t)k_ux_dcd_ra8_usb_max_pipes) {
    return ep;
  }
  return (uint8_t)k_ux_dcd_ra8_usb_max_pipes;
}

RA8_INTERNAL static unsigned int internal_ep0_transfer(struct UX_SLAVE_TRANSFER_STRUCT* tr)
{
  if (tr->ux_slave_transfer_request_in_transfer_length != 0U &&
      tr->ux_slave_transfer_request_data_pointer != nullptr) {
    /* USBX only routes the EP0 *IN* data stage (descriptors, class GET_*)
     * through the DCD transfer function via ``in_transfer_length``. The
     * host->device data stage (e.g. DFU_DNLOAD) is delivered into the
     * control buffer BEFORE the class entry runs -- see the deferred
     * ::ra8_usb_dcp_out_arm / ::ra8_usb_dcp_out_read path driven from
     * ::priv_dispatch_setup and ::priv_handle_ctrl_out_data. */
    const uint16_t len = (uint16_t)tr->ux_slave_transfer_request_in_transfer_length;
    if (ra8_usb_dcp_in_data(g_dcd.speed, tr->ux_slave_transfer_request_data_pointer, len) !=
        k_ra8_ok) {
      return UX_TRANSFER_ERROR;
    }
    tr->ux_slave_transfer_request_actual_length = len;
    return UX_SUCCESS;
  }
  if (ra8_usb_control_response(g_dcd.speed, true) != k_ra8_ok) {
    return UX_TRANSFER_ERROR;
  }
  return UX_SUCCESS;
}

#ifndef UX_DEVICE_STANDALONE
RA8_INTERNAL static unsigned int internal_wait_completion(struct UX_SLAVE_TRANSFER_STRUCT* tr,
                                                          uint8_t                          pipe)
{
  ULONG timeout = tr->ux_slave_transfer_request_timeout;
  if (timeout == 0U) {
    timeout = TX_WAIT_FOREVER;
  }
  if (pipe == 2U) {
    g_diag.xfer_req_pipe2_block++;
  }
  UINT sem_status = tx_semaphore_get(&tr->ux_slave_transfer_request_semaphore, timeout);
  if (pipe == 2U) {
    g_diag.xfer_req_pipe2_woken++;
  }
  if (sem_status != TX_SUCCESS) {
    /* Timeout / aborted: drop the pipe slot so a stale stash cannot
     * cause the IRQ path to complete a now-defunct request. */
    g_dcd.pipes[pipe].xfer                        = nullptr;
    tr->ux_slave_transfer_request_completion_code = UX_TRANSFER_ERROR;
    return UX_TRANSFER_ERROR;
  }
  return tr->ux_slave_transfer_request_completion_code;
}
 
#endif

RA8_INTERNAL static unsigned int internal_submit_consume_orphan(struct UX_SLAVE_TRANSFER_STRUCT* tr,
                                                                uint8_t pipe)
{
  const uint16_t req  = (uint16_t)tr->ux_slave_transfer_request_requested_length;
  const uint16_t mps  = g_dcd.pipes[pipe].max_pkt;
  const uint16_t held = g_orphan_len;
  const uint16_t n    = (held < req) ? held : req;
  priv_trace_event((uint8_t)k_dcd_trace_kind_ouse, g_orphan_buf[0], held);
  (void)memcpy(tr->ux_slave_transfer_request_data_pointer, g_orphan_buf, (size_t)n);
  g_orphan_len                                = 0U;
  tr->ux_slave_transfer_request_actual_length = n;
 
  bool done = (n >= req);
  if (held < mps) {
    done = true; /* short held packet terminates the OUT data phase */
  }
  if (done) {
    tr->ux_slave_transfer_request_completion_code = UX_SUCCESS;
    g_dcd.pipes[pipe].xfer                        = nullptr;
#ifndef UX_DEVICE_STANDALONE
    (void)tx_semaphore_put(&tr->ux_slave_transfer_request_semaphore);
#endif
    return UX_SUCCESS;
  }
  /* Partial: more packets expected -- arm BUF for the streaming tail. */
  if (ra8_usb_rearm_out_pipe(g_dcd.speed, pipe) != k_ra8_ok) {
    g_dcd.pipes[pipe].xfer = nullptr;
    return UX_TRANSFER_ERROR;
  }
  return UX_SUCCESS;
}

RA8_INTERNAL static uint32_t internal_fifo_lock(void)
{
  uint32_t primask = 0U;
  __asm__ volatile("mrs %0, primask" : "=r"(primask));
  __asm__ volatile("cpsid i" ::: "memory");
  return primask;
}

RA8_INTERNAL static void internal_fifo_unlock(uint32_t primask)
{
  if ((primask & 1U) == 0U) {
    __asm__ volatile("cpsie i" ::: "memory");
  }
}

RA8_INTERNAL static unsigned int internal_submit_in_pipe(struct UX_SLAVE_TRANSFER_STRUCT* tr,
                                                         uint8_t                          pipe)
{
  const uint16_t total = (uint16_t)tr->ux_slave_transfer_request_requested_length;
  const uint16_t mps   = g_dcd.pipes[pipe].max_pkt;
  const uint16_t chunk = (total > mps) ? mps : total;
  /* The ISR walk shares the CFIFO port; stage atomically (see
   * internal_fifo_lock). */
  const uint32_t primask = internal_fifo_lock();
  if (ra8_usb_queue_in(g_dcd.speed, pipe, tr->ux_slave_transfer_request_data_pointer, chunk) !=
      k_ra8_ok) {
    internal_fifo_unlock(primask);
    g_dcd.pipes[pipe].xfer = nullptr;
    return UX_TRANSFER_ERROR;
  }
  tr->ux_slave_transfer_request_actual_length = chunk;
  /* Trailing ZLP policy: honor USBX's per-transfer force_zlp flag
   * (set by ux_device_stack_transfer_request only when the host asked
   * for MORE than the payload and the payload is MPS-aligned). An
   * unconditional MPS-exact ZLP corrupts BOT: a 512-byte READ(10)
   * data phase on a 512-MPS HS bulk pipe is single-packet MPS-exact,
   * and the spurious ZLP lands where the host expects the CSW
   * (observed against macOS at HS as a read-LBA0-then-reset loop).
   * The ZLP itself is staged by internal_irq_complete_in on the data
   * packet's BEMP -- bulk IN pipes run single-banked, so there is no
   * second bank to pre-stage it into here. */
  internal_fifo_unlock(primask);
  return UX_SUCCESS;
}

RA8_INTERNAL static unsigned int
internal_submit_pipe(struct UX_SLAVE_TRANSFER_STRUCT* tr, uint8_t pipe, uint8_t ep_addr)
{
  if ((ep_addr & (uint8_t)k_ra8_usb_ep_addr_dir_in_bit) != 0U) {
    return internal_submit_in_pipe(tr, pipe);
  }
  /* OUT pipe. A host packet may already have landed in the controller
   * bank during the PID=BUF window after the previous transfer (the
   * host pipelines a CBW's data phase). internal_irq_drain_orphan_out
   * stashes such a packet; the bulk-OUT wire is serial so it belongs to
   * THIS transfer -- deliver it as packet one. Nested ifs keep the test
   * out of the MC/DC inventory. */
  if (g_orphan_len != 0U) {
    if (g_orphan_pipe == pipe) {
      return internal_submit_consume_orphan(tr, pipe);
    }
  }
  /* No held packet: move PID from NAK to BUF so the controller ACKs the
   * host's first OUT token. internal_irq_complete_out parks the pipe
   * back at NAK once the transfer drains. HUM Ch 36.2.27 PIPECTR.PID. */
  if (ra8_usb_rearm_out_pipe(g_dcd.speed, pipe) != k_ra8_ok) {
    g_dcd.pipes[pipe].xfer = nullptr;
    return UX_TRANSFER_ERROR;
  }
  return UX_SUCCESS;
}

unsigned int priv_transfer_request(struct UX_SLAVE_TRANSFER_STRUCT* tr)
{
  g_diag.xfer_req_total++;
  if (tr == nullptr) {
    g_diag.xfer_req_null_arg++;
    return UX_TRANSFER_ERROR;
  }
  if (tr->ux_slave_transfer_request_endpoint == nullptr) {
    g_diag.xfer_req_null_arg++;
    return UX_TRANSFER_ERROR;
  }
 
  UX_SLAVE_ENDPOINT* ep      = tr->ux_slave_transfer_request_endpoint;
  const uint8_t      ep_addr = (uint8_t)ep->ux_slave_endpoint_descriptor.bEndpointAddress;
  const uint8_t      pipe    = priv_ep_to_pipe(ep_addr);
  if (pipe >= (uint8_t)k_ux_dcd_ra8_usb_max_pipes) {
    g_diag.xfer_req_bad_pipe++;
    return UX_TRANSFER_ERROR;
  }
  if (pipe == 2U) {
    g_diag.xfer_req_pipe2_in++;
    if ((ep_addr & (uint8_t)k_ra8_usb_ep_addr_dir_in_bit) == 0U) {
      g_diag.xfer_req_pipe2_out_dir++;
    }
  }
 
  if (pipe == 0U) {
    return internal_ep0_transfer(tr);
  }
 
  /* Stash the active transfer so the IRQ path can post completion. */
  g_dcd.pipes[pipe].xfer    = tr;
  g_dcd.pipes[pipe].ep_addr = ep_addr;
  g_dcd.pipes[pipe].dir_in =
    (uint8_t)((ep_addr & (uint8_t)k_ra8_usb_ep_addr_dir_in_bit) != 0U ? 1U : 0U);
  g_dcd.pipes[pipe].max_pkt = (uint16_t)ep->ux_slave_endpoint_descriptor.wMaxPacketSize;
  if (pipe == 2U) {
    g_diag.xfer_req_pipe2_stashed++;
  }
 
  const unsigned int submit = internal_submit_pipe(tr, pipe, ep_addr);
  if (submit != UX_SUCCESS) {
    return submit;
  }
 
#ifndef UX_DEVICE_STANDALONE
  return internal_wait_completion(tr, pipe);
#else
  return UX_SUCCESS;
#endif
}