|
ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
|
Static configuration for ra8_eth_gptp_init. More...
#include <ra8_eth_gptp.h>
Data Fields | |
| uint32_t | clk_hz |
| ESWCLK frequency in Hz feeding the GPTP counter. | |
Static configuration for ra8_eth_gptp_init.
The GPTP counter advances by PTPTIVCt.TIV on every clk edge, and clk for the GPTP block is ESWCLK, the ESWM operating clock (HUM 9.10.23 "EtherSW Clock (ESWCLK)" p 405). Pass the live frequency – callers get it from ra8_cgc_eswclk_hz() – and ra8_eth_gptp_init derives TIV from it, so the counter is right on any clock tree rather than only on the one the driver was written against.
Definition at line 124 of file ra8_eth_gptp.h.
| uint32_t ra8_eth_gptp_cfg_t::clk_hz |
ESWCLK frequency in Hz feeding the GPTP counter.
Definition at line 125 of file ra8_eth_gptp.h.
Referenced by ra8_eth_gptp_init().