xSPI per-instance register window. More...

#include <ra8_ospi_regs.h>

Data Fields
volatile uint32_t	WRAPCFG
	+0x000 Wrapper config (CK/DS shift).
volatile uint32_t	COMCFG
	+0x004 Channel arbitration + INT en.
volatile uint32_t	BMCFGCH [2]
	+0x008..+0x00C Bridge map config.
volatile uint32_t	CMCFGCS [8]
	+0x010..+0x02C Command map (2x4 u32).
volatile uint32_t	_r0 [8]
	+0x030 Reserved (32 bytes).
volatile uint32_t	LIOCFGCS [2]
	+0x050..+0x054 Link I/O per target.
volatile uint32_t	ABMCFG
	+0x058 AXI bridge map config.
volatile uint32_t	_r1
	+0x05C Reserved.
volatile uint32_t	BMCTL0
	+0x060 Bridge map control 0.
volatile uint32_t	BMCTL1
	+0x064 Bridge map control 1 (WO).
volatile uint32_t	CMCTLCH [2]
	+0x068..+0x06C XiP command control.
volatile uint32_t	CDCTL0
	+0x070 Manual cmd ctl 0 (TRREQ/CSSEL)
volatile uint32_t	CDCTL1
	+0x074 Manual cmd ctl 1.
volatile uint32_t	CDCTL2
	+0x078 Manual cmd ctl 2.
volatile uint32_t	_r2
	+0x07C Reserved.
volatile uint32_t	CDBUF [16]
	+0x080..+0x0BC Command buf (4x4 u32).
volatile uint32_t	_r3 [16]
	+0x0C0 Reserved (64 bytes).
volatile uint32_t	LPCTL0
	+0x100 Link pattern control 0.
volatile uint32_t	LPCTL1
	+0x104 Link pattern control 1.
volatile uint32_t	LIOCTL
	+0x108 Link I/O control (WP/RST).
volatile uint32_t	_r4 [k_ra8_xspi_r4_words]
	+0x10C Reserved.
volatile uint32_t	CCCTLCS [k_ra8_xspi_ccctlcs_words]
	+0x130 Calib 2x8.
volatile uint32_t	_r5 [k_ra8_xspi_r5_words]
	+0x170 Reserved.
volatile uint32_t	VERSTT
	+0x180 Version (RO).
volatile uint32_t	COMSTT
	+0x184 Common status (MEMACC/PBUFNE).
volatile uint32_t	CASTTCS [2]
	+0x188..+0x18C Calibration status.
volatile uint32_t	INTS
	+0x190 Interrupt status (CMDCMP=b0).
volatile uint32_t	INTC
	+0x194 Interrupt clear (W1C).
volatile uint32_t	INTE
	+0x198 Interrupt enable.

Detailed Description

xSPI per-instance register window.

Byte-accurate mirror of FSP R_XSPI0_Type (412 bytes). Sub-blocks that FSP models with nested structs are collapsed to flat uint32_t arrays so the driver can write individual 32-bit words without bringing in bit-field layouts we do not touch from this codebase.

Invariant: sizeof(r_xspi_regs_t) == 0x19C.

See also: k_ra8_xspi0_base_addr XSPI0 base address.; ra8_xspi() Pointer accessor.

Since: 0.1.0

Definition at line 142 of file ra8_ospi_regs.h.

Field Documentation

◆ _r0

volatile uint32_t r_xspi_regs_t::_r0[8]

+0x030 Reserved (32 bytes).

Definition at line 147 of file ra8_ospi_regs.h.

◆ _r1

volatile uint32_t r_xspi_regs_t::_r1

+0x05C Reserved.

Definition at line 150 of file ra8_ospi_regs.h.

◆ _r2

volatile uint32_t r_xspi_regs_t::_r2

+0x07C Reserved.

Definition at line 157 of file ra8_ospi_regs.h.

◆ _r3

volatile uint32_t r_xspi_regs_t::_r3[16]

+0x0C0 Reserved (64 bytes).

Definition at line 159 of file ra8_ospi_regs.h.

◆ _r4

volatile uint32_t r_xspi_regs_t::_r4[k_ra8_xspi_r4_words]

+0x10C Reserved.

Definition at line 163 of file ra8_ospi_regs.h.

◆ _r5

volatile uint32_t r_xspi_regs_t::_r5[k_ra8_xspi_r5_words]

+0x170 Reserved.

Definition at line 165 of file ra8_ospi_regs.h.

◆ ABMCFG

volatile uint32_t r_xspi_regs_t::ABMCFG

+0x058 AXI bridge map config.

Definition at line 149 of file ra8_ospi_regs.h.

◆ BMCFGCH

volatile uint32_t r_xspi_regs_t::BMCFGCH[2]

+0x008..+0x00C Bridge map config.

Definition at line 145 of file ra8_ospi_regs.h.

◆ BMCTL0

volatile uint32_t r_xspi_regs_t::BMCTL0

+0x060 Bridge map control 0.

Definition at line 151 of file ra8_ospi_regs.h.

Referenced by internal_xspi_apply_config(), ra8_xspi_set_xip_mode(), ra8_xspi_xip_enter(), and ra8_xspi_xip_exit().

◆ BMCTL1

volatile uint32_t r_xspi_regs_t::BMCTL1

+0x064 Bridge map control 1 (WO).

Definition at line 152 of file ra8_ospi_regs.h.

◆ CASTTCS

volatile uint32_t r_xspi_regs_t::CASTTCS[2]

+0x188..+0x18C Calibration status.

Definition at line 168 of file ra8_ospi_regs.h.

◆ CCCTLCS

volatile uint32_t r_xspi_regs_t::CCCTLCS[k_ra8_xspi_ccctlcs_words]

+0x130 Calib 2x8.

Definition at line 164 of file ra8_ospi_regs.h.

Referenced by ra8_xspi_calibrate_dqs().

◆ CDBUF

volatile uint32_t r_xspi_regs_t::CDBUF[16]

+0x080..+0x0BC Command buf (4x4 u32).

Definition at line 158 of file ra8_ospi_regs.h.

Referenced by internal_build_chunk_header(), internal_flash_read_chunk(), internal_issue_read_opcode(), internal_issue_reset_opcode(), internal_xspi_stage_payload(), priv_ra8_xspi_issue_simple_opcode(), ra8_xspi_direct_command(), ra8_xspi_flash_read_id(), and ra8_xspi_flash_read_status().

◆ CDCTL0

volatile uint32_t r_xspi_regs_t::CDCTL0

+0x070 Manual cmd ctl 0 (TRREQ/CSSEL)

Definition at line 154 of file ra8_ospi_regs.h.

Referenced by internal_xspi_apply_config(), and priv_ra8_xspi_kick_command().

◆ CDCTL1

volatile uint32_t r_xspi_regs_t::CDCTL1

+0x074 Manual cmd ctl 1.

Definition at line 155 of file ra8_ospi_regs.h.

◆ CDCTL2

volatile uint32_t r_xspi_regs_t::CDCTL2

+0x078 Manual cmd ctl 2.

Definition at line 156 of file ra8_ospi_regs.h.

◆ CMCFGCS

volatile uint32_t r_xspi_regs_t::CMCFGCS[8]

+0x010..+0x02C Command map (2x4 u32).

Definition at line 146 of file ra8_ospi_regs.h.

Referenced by ra8_xspi_set_xip_mode().

◆ CMCTLCH

volatile uint32_t r_xspi_regs_t::CMCTLCH[2]

+0x068..+0x06C XiP command control.

Definition at line 153 of file ra8_ospi_regs.h.

Referenced by internal_xspi_apply_config(), ra8_xspi_set_xip_mode(), ra8_xspi_xip_enter(), and ra8_xspi_xip_exit().

◆ COMCFG

volatile uint32_t r_xspi_regs_t::COMCFG

+0x004 Channel arbitration + INT en.

Definition at line 144 of file ra8_ospi_regs.h.

Referenced by internal_xspi_apply_config().

◆ COMSTT

volatile uint32_t r_xspi_regs_t::COMSTT

+0x184 Common status (MEMACC/PBUFNE).

Definition at line 167 of file ra8_ospi_regs.h.

Referenced by ra8_xspi_get_status().

◆ INTC

volatile uint32_t r_xspi_regs_t::INTC

+0x194 Interrupt clear (W1C).

Definition at line 170 of file ra8_ospi_regs.h.

Referenced by internal_wait_command_done(), internal_xspi_apply_config(), ra8_xspi_clear_status(), ra8_xspi_deinit(), and ra8_xspi_dispatch().

◆ INTE

volatile uint32_t r_xspi_regs_t::INTE

+0x198 Interrupt enable.

Definition at line 171 of file ra8_ospi_regs.h.

Referenced by ra8_xspi_deinit().

◆ INTS

volatile uint32_t r_xspi_regs_t::INTS

+0x190 Interrupt status (CMDCMP=b0).

Definition at line 169 of file ra8_ospi_regs.h.

Referenced by internal_wait_command_done(), and ra8_xspi_dispatch().

◆ LIOCFGCS

volatile uint32_t r_xspi_regs_t::LIOCFGCS[2]

+0x050..+0x054 Link I/O per target.

Definition at line 148 of file ra8_ospi_regs.h.

Referenced by internal_xspi_apply_config(), ra8_xspi_deinit(), and ra8_xspi_set_dtr_mode().

◆ LIOCTL

volatile uint32_t r_xspi_regs_t::LIOCTL

+0x108 Link I/O control (WP/RST).

Definition at line 162 of file ra8_ospi_regs.h.

Referenced by internal_xspi_reset_device().

◆ LPCTL0

volatile uint32_t r_xspi_regs_t::LPCTL0

+0x100 Link pattern control 0.

Definition at line 160 of file ra8_ospi_regs.h.

◆ LPCTL1

volatile uint32_t r_xspi_regs_t::LPCTL1

+0x104 Link pattern control 1.

Definition at line 161 of file ra8_ospi_regs.h.

◆ VERSTT

volatile uint32_t r_xspi_regs_t::VERSTT

+0x180 Version (RO).

Definition at line 166 of file ra8_ospi_regs.h.

◆ WRAPCFG

volatile uint32_t r_xspi_regs_t::WRAPCFG

+0x000 Wrapper config (CK/DS shift).

Definition at line 143 of file ra8_ospi_regs.h.