ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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r_sram_regs_t Struct Reference

Memory layout of the SRAM control window. More...

#include <ra8_sram_regs.h>

Data Fields

volatile uint16_t SRAMPRCR_S
 +0x00 Secure write-protect.
volatile uint16_t _r0
 +0x02 Padding.
volatile uint16_t SRAMPRCR_NS
 +0x04 Non-Secure write-protect.
volatile uint16_t _r1
 +0x06 Padding.
volatile uint8_t SRAMWTSC
 +0x08 Wait-state control.
volatile uint8_t _r2 [k_ra8_sram_pad_wtsc_to_cr]
 +0x09..+0x0F Padding.
volatile uint8_t SRAMCR [k_ra8_sram_bank_count]
 +0x10..+0x13 (sparse, see _r3).
volatile uint8_t _r3 [k_ra8_sram_pad_cr_sparse_bytes]
 +0x14..+0x1F Pad for sparse CR slots.
volatile uint8_t _r4 [16]
 +0x20..+0x2F Reserved.
volatile uint8_t SRAMECCRGN [k_ra8_sram_bank_count]
 +0x30..+0x33 (sparse, see _r5).
volatile uint8_t _r5 [k_ra8_sram_pad_eccrgn_sparse]
 +0x34..+0x3F Padding for sparse RGN slots.
volatile uint16_t SRAMESR
 +0x40 ECC error status.
volatile uint16_t _r6
 +0x42 Padding.
volatile uint8_t _r7 [4]
 +0x44..+0x47 Reserved.
volatile uint16_t SRAMESCLR
 +0x48 ECC error status clear.
volatile uint16_t _r8
 +0x4A Padding.
volatile uint8_t _r9 [4]
 +0x4C..+0x4F Reserved.
volatile uint32_t SRAMEAR [k_ra8_sram_bank_count][k_ra8_sram_ear_pair_count]
 +0x50..+0x7F Error addresses.

Detailed Description

Memory layout of the SRAM control window.

Field offsets verified against HUM Ch 58.2.4..58.2.14, p 3530-3537. Reserved gaps are exposed as _rN[] padding so the next register lands at its documented offset.

  • +0x00 SRAMPRCR_S (16-bit, half-word access only – see HUM 58.2.4)
  • +0x04 SRAMPRCR_NS (16-bit)
  • +0x08 SRAMWTSC ( 8-bit)
  • +0x10..+0x1C SRAMCR0..3 (8-bit each, +4 stride)
  • +0x30..+0x3C SRAMECCRGN0..3 (8-bit, +4 stride)
  • +0x40 SRAMESR (16-bit)
  • +0x48 SRAMESCLR (16-bit)
  • +0x50..+0x7C SRAMEAR[bank][slot] (32-bit, +0x10 per bank, +0x04 per slot)
Invariant
sizeof(r_sram_regs_t) covers offset 0x00 through 0x7F.

Definition at line 500 of file ra8_sram_regs.h.

Field Documentation

◆ _r0

volatile uint16_t r_sram_regs_t::_r0

+0x02 Padding.

Definition at line 502 of file ra8_sram_regs.h.

◆ _r1

volatile uint16_t r_sram_regs_t::_r1

+0x06 Padding.

Definition at line 504 of file ra8_sram_regs.h.

◆ _r2

volatile uint8_t r_sram_regs_t::_r2[k_ra8_sram_pad_wtsc_to_cr]

+0x09..+0x0F Padding.

Definition at line 506 of file ra8_sram_regs.h.

◆ _r3

volatile uint8_t r_sram_regs_t::_r3[k_ra8_sram_pad_cr_sparse_bytes]

+0x14..+0x1F Pad for sparse CR slots.

Definition at line 512 of file ra8_sram_regs.h.

◆ _r4

volatile uint8_t r_sram_regs_t::_r4[16]

+0x20..+0x2F Reserved.

Definition at line 513 of file ra8_sram_regs.h.

◆ _r5

volatile uint8_t r_sram_regs_t::_r5[k_ra8_sram_pad_eccrgn_sparse]

+0x34..+0x3F Padding for sparse RGN slots.

Definition at line 516 of file ra8_sram_regs.h.

◆ _r6

volatile uint16_t r_sram_regs_t::_r6

+0x42 Padding.

Definition at line 518 of file ra8_sram_regs.h.

◆ _r7

volatile uint8_t r_sram_regs_t::_r7[4]

+0x44..+0x47 Reserved.

Definition at line 519 of file ra8_sram_regs.h.

◆ _r8

volatile uint16_t r_sram_regs_t::_r8

+0x4A Padding.

Definition at line 521 of file ra8_sram_regs.h.

◆ _r9

volatile uint8_t r_sram_regs_t::_r9[4]

+0x4C..+0x4F Reserved.

Definition at line 522 of file ra8_sram_regs.h.

◆ SRAMCR

volatile uint8_t r_sram_regs_t::SRAMCR[k_ra8_sram_bank_count]

+0x10..+0x13 (sparse, see _r3).

Definition at line 507 of file ra8_sram_regs.h.

◆ SRAMEAR

volatile uint32_t r_sram_regs_t::SRAMEAR[k_ra8_sram_bank_count][k_ra8_sram_ear_pair_count]

+0x50..+0x7F Error addresses.

Definition at line 523 of file ra8_sram_regs.h.

Referenced by ra8_sram_get_status().

◆ SRAMECCRGN

volatile uint8_t r_sram_regs_t::SRAMECCRGN[k_ra8_sram_bank_count]

+0x30..+0x33 (sparse, see _r5).

Definition at line 514 of file ra8_sram_regs.h.

◆ SRAMESCLR

volatile uint16_t r_sram_regs_t::SRAMESCLR

+0x48 ECC error status clear.

Definition at line 520 of file ra8_sram_regs.h.

Referenced by ra8_sram_clear_address(), ra8_sram_clear_status(), and ra8_sram_init().

◆ SRAMESR

volatile uint16_t r_sram_regs_t::SRAMESR

+0x40 ECC error status.

Definition at line 517 of file ra8_sram_regs.h.

Referenced by ra8_sram_get_status(), and ra8_sram_self_test().

◆ SRAMPRCR_NS

volatile uint16_t r_sram_regs_t::SRAMPRCR_NS

+0x04 Non-Secure write-protect.

Definition at line 503 of file ra8_sram_regs.h.

◆ SRAMPRCR_S

volatile uint16_t r_sram_regs_t::SRAMPRCR_S

+0x00 Secure write-protect.

Definition at line 501 of file ra8_sram_regs.h.

Referenced by internal_write_cr_locked(), internal_write_eccrgn_locked(), and internal_write_wtsc_locked().

◆ SRAMWTSC

volatile uint8_t r_sram_regs_t::SRAMWTSC

+0x08 Wait-state control.

Definition at line 505 of file ra8_sram_regs.h.

Referenced by internal_write_wtsc_locked().

The documentation for this struct was generated from the following file: