ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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r_sci_regs_t Struct Reference

Per-channel SCI_B register window. More...

#include <ra8_sci_regs.h>

Data Fields

volatile uint32_t RDR
 +0x00 Receive Data.
volatile uint32_t TDR
 +0x04 Transmit Data.
volatile uint32_t CCR0
 +0x08 Common Control 0.
volatile uint32_t CCR1
 +0x0C Common Control 1.
volatile uint32_t CCR2
 +0x10 Common Control 2.
volatile uint32_t CCR3
 +0x14 Common Control 3.
volatile uint32_t CCR4
 +0x18 Common Control 4.
volatile uint32_t CESR
 +0x1C Communication Enable Status.
volatile uint32_t ICR
 +0x20 Simple IIC Control.
volatile uint32_t FCR
 +0x24 FIFO Control.
volatile uint32_t _r_28
 Reserved at offset 0x28.
volatile uint32_t MCR
 +0x2C Manchester Control.
volatile uint32_t DCR
 +0x30 Driver Control.
volatile uint32_t XCR0
 +0x34 Simple LIN Control 0.
volatile uint32_t XCR1
 +0x38 Simple LIN Control 1.
volatile uint32_t XCR2
 +0x3C Simple LIN Control 2.
volatile uint32_t _r_40 [2]
 Reserved at offsets 0x40..0x47.
volatile uint32_t CSR
 +0x48 Common Status.
volatile uint32_t ISR
 +0x4C Simple IIC Status.
volatile uint32_t FRSR
 +0x50 FIFO Receive Status.
volatile uint32_t FTSR
 +0x54 FIFO Transmit Status.
volatile uint32_t MSR
 +0x58 Manchester Status.
volatile uint32_t XSR0
 +0x5C Simple LIN Status 0.
volatile uint32_t XSR1
 +0x60 Simple LIN Status 1.
volatile uint32_t _r_64
 Reserved at offset 0x64.
volatile uint32_t CFCLR
 +0x68 Common Flag Clear.
volatile uint32_t ICFCLR
 +0x6C Simple IIC Flag Clear.
volatile uint32_t FFCLR
 +0x70 FIFO Flag Clear.
volatile uint32_t MFCLR
 +0x74 Manchester Flag Clear.
volatile uint32_t XFCLR
 +0x78 Simple LIN Flag Clear.

Detailed Description

Per-channel SCI_B register window.

Models the SCI_B 32-bit-register layout defined by HUM Ch 38.2 register summary tables, p 2174 onwards. Reserved gaps in the 256-byte window are filled with named padding fields so the layout is unambiguous.

Invariant
All members are 32-bit aligned and 32 bits wide; SCI_B does not use byte-wide registers.
sizeof(r_sci_regs_t) is bounded by the channel stride (k_ra8_sci_channel_stride).

Definition at line 131 of file ra8_sci_regs.h.

Field Documentation

◆ _r_28

volatile uint32_t r_sci_regs_t::_r_28

Reserved at offset 0x28.

Definition at line 142 of file ra8_sci_regs.h.

◆ _r_40

volatile uint32_t r_sci_regs_t::_r_40[2]

Reserved at offsets 0x40..0x47.

Definition at line 148 of file ra8_sci_regs.h.

◆ _r_64

volatile uint32_t r_sci_regs_t::_r_64

Reserved at offset 0x64.

Definition at line 156 of file ra8_sci_regs.h.

◆ CCR0

volatile uint32_t r_sci_regs_t::CCR0

+0x08 Common Control 0.

(HUM 38.2.5 p 2182)

Definition at line 134 of file ra8_sci_regs.h.

Referenced by internal_lin_program_mode(), internal_program_ccr_bank(), ra8_sci_abort(), ra8_sci_attach_rx_handler(), ra8_sci_attach_tx_handler(), ra8_sci_deinit(), ra8_sci_dispatch_rxi(), ra8_sci_dispatch_txi(), ra8_sci_enter_stop(), ra8_sci_init(), ra8_sci_read(), ra8_sci_read_stop(), ra8_sci_receive_resume(), ra8_sci_receive_suspend(), ra8_sci_spi_deinit(), ra8_sci_spi_init(), ra8_sci_spi_set_clock(), and ra8_sci_write().

◆ CCR1

volatile uint32_t r_sci_regs_t::CCR1

+0x0C Common Control 1.

(HUM 38.2.6 p 2185)

Definition at line 135 of file ra8_sci_regs.h.

Referenced by internal_program_ccr_bank(), and ra8_sci_spi_init().

◆ CCR2

volatile uint32_t r_sci_regs_t::CCR2

+0x10 Common Control 2.

(HUM 38.2.7 p 2189)

Definition at line 136 of file ra8_sci_regs.h.

Referenced by internal_apply_rate(), internal_program_ccr_bank(), and ra8_sci_set_baud().

◆ CCR3

volatile uint32_t r_sci_regs_t::CCR3

+0x14 Common Control 3.

(HUM 38.2.8 p 2203)

Definition at line 137 of file ra8_sci_regs.h.

Referenced by internal_lin_program_mode(), internal_program_ccr_bank(), and ra8_sci_spi_init().

◆ CCR4

volatile uint32_t r_sci_regs_t::CCR4

+0x18 Common Control 4.

(HUM 38.2.9 p 2210)

Definition at line 138 of file ra8_sci_regs.h.

Referenced by internal_program_ccr_bank(), and ra8_sci_spi_init().

◆ CESR

volatile uint32_t r_sci_regs_t::CESR

+0x1C Communication Enable Status.

(HUM 38.2.29 p 2240)

Definition at line 139 of file ra8_sci_regs.h.

◆ CFCLR

volatile uint32_t r_sci_regs_t::CFCLR

+0x68 Common Flag Clear.

(HUM 38.2.24 p 2238)

Definition at line 157 of file ra8_sci_regs.h.

Referenced by internal_clear_csr_flags(), ra8_sci_clear_errors(), ra8_sci_spi_init(), and ra8_sci_spi_xfer8().

◆ CSR

volatile uint32_t r_sci_regs_t::CSR

+0x48 Common Status.

(HUM 38.2.17 p 2225)

Definition at line 149 of file ra8_sci_regs.h.

Referenced by internal_wait_tx_end(), ra8_sci_get_errors(), ra8_sci_getc_polling(), ra8_sci_putc_polling(), and ra8_sci_spi_xfer8().

◆ DCR

volatile uint32_t r_sci_regs_t::DCR

+0x30 Driver Control.

(HUM 38.2.13 p 2219)

Definition at line 144 of file ra8_sci_regs.h.

◆ FCR

volatile uint32_t r_sci_regs_t::FCR

+0x24 FIFO Control.

(HUM 38.2.11 p 2215)

Definition at line 141 of file ra8_sci_regs.h.

Referenced by internal_program_ccr_bank().

◆ FFCLR

volatile uint32_t r_sci_regs_t::FFCLR

+0x70 FIFO Flag Clear.

(HUM 38.2.26 p 2239)

Definition at line 159 of file ra8_sci_regs.h.

Referenced by internal_clear_csr_flags().

◆ FRSR

volatile uint32_t r_sci_regs_t::FRSR

+0x50 FIFO Receive Status.

(HUM 38.2.19 p 2231)

Definition at line 151 of file ra8_sci_regs.h.

◆ FTSR

volatile uint32_t r_sci_regs_t::FTSR

+0x54 FIFO Transmit Status.

(HUM 38.2.20 p 2232)

Definition at line 152 of file ra8_sci_regs.h.

◆ ICFCLR

volatile uint32_t r_sci_regs_t::ICFCLR

+0x6C Simple IIC Flag Clear.

(HUM 38.2.25 p 2239)

Definition at line 158 of file ra8_sci_regs.h.

◆ ICR

volatile uint32_t r_sci_regs_t::ICR

+0x20 Simple IIC Control.

(HUM 38.2.10 p 2212)

Definition at line 140 of file ra8_sci_regs.h.

◆ ISR

volatile uint32_t r_sci_regs_t::ISR

+0x4C Simple IIC Status.

(HUM 38.2.18 p 2230)

Definition at line 150 of file ra8_sci_regs.h.

◆ MCR

volatile uint32_t r_sci_regs_t::MCR

+0x2C Manchester Control.

(HUM 38.2.12 p 2216)

Definition at line 143 of file ra8_sci_regs.h.

◆ MFCLR

volatile uint32_t r_sci_regs_t::MFCLR

+0x74 Manchester Flag Clear.

(HUM 38.2.27 p 2240)

Definition at line 160 of file ra8_sci_regs.h.

◆ MSR

volatile uint32_t r_sci_regs_t::MSR

+0x58 Manchester Status.

(HUM 38.2.21 p 2233)

Definition at line 153 of file ra8_sci_regs.h.

◆ RDR

volatile uint32_t r_sci_regs_t::RDR

+0x00 Receive Data.

(HUM 38.2.2 p 2180)

Definition at line 132 of file ra8_sci_regs.h.

Referenced by ra8_sci_dispatch_rxi(), ra8_sci_getc_polling(), ra8_sci_read_dma(), and ra8_sci_spi_xfer8().

◆ TDR

volatile uint32_t r_sci_regs_t::TDR

+0x04 Transmit Data.

(HUM 38.2.3 p 2181)

Definition at line 133 of file ra8_sci_regs.h.

Referenced by ra8_sci_dispatch_txi(), ra8_sci_putc_polling(), ra8_sci_spi_xfer8(), and ra8_sci_write_dma().

◆ XCR0

volatile uint32_t r_sci_regs_t::XCR0

+0x34 Simple LIN Control 0.

(HUM 38.2.14 p 2220)

Definition at line 145 of file ra8_sci_regs.h.

Referenced by internal_lin_program_mode().

◆ XCR1

volatile uint32_t r_sci_regs_t::XCR1

+0x38 Simple LIN Control 1.

(HUM 38.2.15 p 2223)

Definition at line 146 of file ra8_sci_regs.h.

Referenced by internal_lin_program_mode(), internal_lin_wait_break_done(), and ra8_sci_lin_send_break().

◆ XCR2

volatile uint32_t r_sci_regs_t::XCR2

+0x3C Simple LIN Control 2.

(HUM 38.2.16 p 2224)

Definition at line 147 of file ra8_sci_regs.h.

Referenced by internal_lin_program_mode().

◆ XFCLR

volatile uint32_t r_sci_regs_t::XFCLR

+0x78 Simple LIN Flag Clear.

(HUM 38.2.28 p 2240)

Definition at line 161 of file ra8_sci_regs.h.

Referenced by ra8_sci_lin_clear_status().

◆ XSR0

volatile uint32_t r_sci_regs_t::XSR0

+0x5C Simple LIN Status 0.

(HUM 38.2.22 p 2235)

Definition at line 154 of file ra8_sci_regs.h.

Referenced by ra8_sci_lin_break_detected(), and ra8_sci_lin_wait_break().

◆ XSR1

volatile uint32_t r_sci_regs_t::XSR1

+0x60 Simple LIN Status 1.

(HUM 38.2.23 p 2237)

Definition at line 155 of file ra8_sci_regs.h.

The documentation for this struct was generated from the following file: