Shared DMA module-control register window. More...

#include <ra8_dmac_regs.h>

Data Fields
volatile uint8_t	DMAST
	+0x00 DMA Module Activation (bit DMST).
volatile uint8_t	_r0
	+0x01 reserved.
volatile uint16_t	_r1
	+0x02 reserved.
volatile uint32_t	_r2 [k_ra8_dma_pad0_words]
	+0x04..0x0F reserved.
volatile uint8_t	DMCTL
	+0x10 DMAC Control (PR / ERCH).
volatile uint8_t	_r3
	+0x11 reserved.
volatile uint16_t	_r4
	+0x12 reserved.
volatile uint32_t	_r5 [k_ra8_dma_pad1_words]
	+0x14..0x3F reserved.
volatile uint32_t	DMECHR
	+0x40 Error-channel status.
volatile uint32_t	_r6 [k_ra8_dma_pad2_words]
	+0x44..0x7F reserved.
volatile uint32_t	DELSR [k_ra8_dma_delsr_count]
	+0x80 ELC link sel.

Detailed Description

Shared DMA module-control register window.

Verified against FSP R_DMA_Type (R7KA8D2KF_core0.h lines 5610-5671, size = 160 / 0xa0 bytes). Holds the global activation gate, controller-wide priority/error-clear control, error-channel status and the per-channel ELC event-link select registers.

Definition at line 116 of file ra8_dmac_regs.h.

Field Documentation

◆ _r0

volatile uint8_t r_dma_shared_regs_t::_r0

+0x01 reserved.

Definition at line 118 of file ra8_dmac_regs.h.

◆ _r1

volatile uint16_t r_dma_shared_regs_t::_r1

+0x02 reserved.

Definition at line 119 of file ra8_dmac_regs.h.

◆ _r2

volatile uint32_t r_dma_shared_regs_t::_r2[k_ra8_dma_pad0_words]

+0x04..0x0F reserved.

Definition at line 120 of file ra8_dmac_regs.h.

◆ _r3

volatile uint8_t r_dma_shared_regs_t::_r3

+0x11 reserved.

Definition at line 122 of file ra8_dmac_regs.h.

◆ _r4

volatile uint16_t r_dma_shared_regs_t::_r4

+0x12 reserved.

Definition at line 123 of file ra8_dmac_regs.h.

◆ _r5

volatile uint32_t r_dma_shared_regs_t::_r5[k_ra8_dma_pad1_words]

+0x14..0x3F reserved.

Definition at line 124 of file ra8_dmac_regs.h.

◆ _r6

volatile uint32_t r_dma_shared_regs_t::_r6[k_ra8_dma_pad2_words]

+0x44..0x7F reserved.

Definition at line 126 of file ra8_dmac_regs.h.

◆ DELSR

volatile uint32_t r_dma_shared_regs_t::DELSR[k_ra8_dma_delsr_count]

+0x80 ELC link sel.

Definition at line 127 of file ra8_dmac_regs.h.

◆ DMAST

volatile uint8_t r_dma_shared_regs_t::DMAST

+0x00 DMA Module Activation (bit DMST).

Definition at line 117 of file ra8_dmac_regs.h.

Referenced by ra8_dmac_start().

◆ DMCTL

volatile uint8_t r_dma_shared_regs_t::DMCTL

+0x10 DMAC Control (PR / ERCH).

Definition at line 121 of file ra8_dmac_regs.h.

◆ DMECHR

volatile uint32_t r_dma_shared_regs_t::DMECHR

+0x40 Error-channel status.

Definition at line 125 of file ra8_dmac_regs.h.

The documentation for this struct was generated from the following file:

libs/ra8_hal/inc/ra8_dmac_regs.h

Data Fields