Cross-core message block backed by a fixed shared-SRAM address. More...

#include <dualcore_mailbox.h>

Data Fields
volatile uint32_t	request_seq
	M85 increments after writing request.
volatile uint32_t	reply_seq
	M33 sets equal to request_seq when done.
volatile uint32_t	request
	M85 -> M33: the operand to transform.
volatile uint32_t	reply
	M33 -> M85: request * 3 + 1.
volatile uint32_t	m33_signature
	M33 stamps k_dualcore_m33_signature.
volatile uint32_t	m33_replies
	M33 increments per reply (liveness count).

Detailed Description

Cross-core message block backed by a fixed shared-SRAM address.

All fields are volatile so each core re-reads memory every iteration of its poll loop rather than caching a value in a register. The M85 owns the request* fields (writer) and the M33 owns the reply*, m33_signature, and m33_replies fields (writer); the opposite core only reads them. The sequence counters carry the wakeup edge, the data words carry the payload.

Invariant: reply_seq lags request_seq by 0 or 1.; Both sequence counters increase monotonically.; m33_signature is 0 until the M33 has booted, then k_dualcore_m33_signature forever.

Example:: volatile dualcore_mailbox_t* mb = dualcore_mailbox();

mb->request = 7U;

__asm volatile("dsb" ::: "memory");

mb->request_seq = 1U; // wake the M33

dualcore_mailbox
static volatile dualcore_mailbox_t * dualcore_mailbox(void)
Typed pointer to the fixed-address shared mailbox.
Definition dualcore_mailbox.h:150

dualcore_mailbox_t
Cross-core message block backed by a fixed shared-SRAM address.
Definition dualcore_mailbox.h:123

dualcore_mailbox_t::request_seq
volatile uint32_t request_seq
M85 increments after writing request.
Definition dualcore_mailbox.h:124

dualcore_mailbox_t::request
volatile uint32_t request
M85 -> M33: the operand to transform.
Definition dualcore_mailbox.h:126