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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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Shadow of the write-only DRW register file plus render statistics. More...
Data Fields | |
| uint32_t | control |
| CONTROL: limiter enables. | |
| uint32_t | control2 |
| CONTROL2: format / blend / alpha. | |
| uint32_t | color1 |
| COLOR1: source colour. | |
| uint32_t | color2 |
| COLOR2: secondary colour. | |
| uint32_t | size |
| SIZE: packed bounding box W/H. | |
| uint32_t | pitch |
| PITCH: framebuffer pitch, pixels. | |
| uint32_t | origin |
| ORIGIN: bounding box anchor. | |
| uint32_t | cachectl |
| CACHECTL: cache enables. | |
| uint32_t | renders |
| Bounding boxes rasterized. | |
| uint32_t | skipped |
| Renders declined as unmodelled. | |
| uint32_t | last_w |
| Width of the last render. | |
| uint32_t | last_h |
| Height of the last render. | |
Shadow of the write-only DRW register file plus render statistics.
Every DRW register except STATUS, HWREVISION and the performance counters is write-only on silicon (HUM Ch 62.2, R/W column "W"), so the model keeps its own copies to rasterize from.
pitch and size are zero until firmware programs them, and a render with either zero is a no-op.Definition at line 242 of file board_periph_drw.c.
| uint32_t drw_state_t::cachectl |
CACHECTL: cache enables.
Definition at line 250 of file board_periph_drw.c.
| uint32_t drw_state_t::color1 |
COLOR1: source colour.
Definition at line 245 of file board_periph_drw.c.
| uint32_t drw_state_t::color2 |
COLOR2: secondary colour.
Definition at line 246 of file board_periph_drw.c.
| uint32_t drw_state_t::control |
CONTROL: limiter enables.
Definition at line 243 of file board_periph_drw.c.
| uint32_t drw_state_t::control2 |
CONTROL2: format / blend / alpha.
Definition at line 244 of file board_periph_drw.c.
| uint32_t drw_state_t::last_h |
Height of the last render.
Definition at line 254 of file board_periph_drw.c.
| uint32_t drw_state_t::last_w |
Width of the last render.
Definition at line 253 of file board_periph_drw.c.
| uint32_t drw_state_t::origin |
ORIGIN: bounding box anchor.
Definition at line 249 of file board_periph_drw.c.
| uint32_t drw_state_t::pitch |
PITCH: framebuffer pitch, pixels.
Definition at line 248 of file board_periph_drw.c.
| uint32_t drw_state_t::renders |
Bounding boxes rasterized.
Definition at line 251 of file board_periph_drw.c.
| uint32_t drw_state_t::size |
SIZE: packed bounding box W/H.
Definition at line 247 of file board_periph_drw.c.
| uint32_t drw_state_t::skipped |
Renders declined as unmodelled.
Definition at line 252 of file board_periph_drw.c.