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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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Cross-CPU message struct backed by a fixed SRAM address. More...
#include <shared_pingpong.h>
Data Fields | |
| volatile uint32_t | ping_seq |
| CPU0 increments after writing payload. | |
| volatile uint32_t | pong_seq |
| CPU1 sets to match ping_seq after reply. | |
| volatile uint32_t | ping_payload |
| CPU0 writes, CPU1 reads. | |
| volatile uint32_t | pong_payload |
| CPU1 writes, CPU0 reads. | |
Cross-CPU message struct backed by a fixed SRAM address.
Volatile so the compiler emits real memory accesses each iteration of the poll loops. Aligned to 16 bytes so the struct starts on a cache-line / strongly-ordered boundary even if the D-cache is later enabled.
Definition at line 106 of file shared_pingpong.h.
| volatile uint32_t cpu1_pingpong_shared_t::ping_payload |
CPU0 writes, CPU1 reads.
Definition at line 109 of file shared_pingpong.h.
Referenced by internal_cpu1_main(), and main().
| volatile uint32_t cpu1_pingpong_shared_t::ping_seq |
CPU0 increments after writing payload.
Definition at line 107 of file shared_pingpong.h.
Referenced by internal_cpu1_main(), and main().
| volatile uint32_t cpu1_pingpong_shared_t::pong_payload |
CPU1 writes, CPU0 reads.
Definition at line 110 of file shared_pingpong.h.
Referenced by internal_cpu1_main(), and main().
| volatile uint32_t cpu1_pingpong_shared_t::pong_seq |
CPU1 sets to match ping_seq after reply.
Definition at line 108 of file shared_pingpong.h.
Referenced by internal_cpu1_main(), internal_wait_for_pong(), and main().