40static const char*
s_tag =
"SRAM";
146 if (global_fn !=
nullptr) {
147 global_fn(global_ctx, bank, is_2bit, err_addr);
151 if (bank_fn !=
nullptr) {
152 bank_fn(bank_ctx, bank, is_2bit, err_addr);
165 if (out_status !=
nullptr) {
171 const uint16_t one_bit_pos = (uint16_t)((uint16_t)2U * (uint16_t)bank);
172 const uint16_t two_bit_pos = (uint16_t)(one_bit_pos + 1U);
173 const uint16_t one_bit_msk = (uint16_t)((uint16_t)1U << one_bit_pos);
174 const uint16_t two_bit_msk = (uint16_t)((uint16_t)1U << two_bit_pos);
176 if ((local.
raw_esr & one_bit_msk) != 0U) {
178 fired = (uint16_t)(fired | one_bit_msk);
180 if ((local.
raw_esr & two_bit_msk) != 0U) {
182 fired = (uint16_t)(fired | two_bit_msk);
static const char * s_tag
Logging / check tag.
Validation and Error-Checking Macros for ra8-firmware.
#define RA8_CHECK_NULL_PTR(ptr, tag, message)
Reject nullptr pointer, returning k_ra8_err_null_ptr.
Error Code Definitions for ra8-firmware.
@ k_ra8_err_invalid_arg
Invalid function argument.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
Lightweight Logging Interface for ra8-firmware.
SRAM (with ECC) HAL driver public API.
void(* ra8_sram_error_fn_t)(void *ctx, uint8_t bank, bool is_2bit, uintptr_t err_addr)
ECC error callback signature.
ra8_err_t ra8_sram_get_status(ra8_sram_status_t *out)
Snapshot the current ECC error state across all four banks.
src/-local shared surface for the SRAM HAL driver split.
ra8_sram_error_fn_t g_sram_on_error
Registered global ECC error callback (NULL until attach).
ra8_sram_error_fn_t g_sram_on_error_bank[k_ra8_sram_bank_count]
Per-bank ECC error callback table (NULL until attach).
void * g_sram_on_error_ctx
Caller context forwarded to g_sram_on_error.
void * g_sram_on_error_bank_ctx[k_ra8_sram_bank_count]
Per-bank context forwarded to g_sram_on_error_bank.
SRAM (with ECC) control / status / security register layout.
@ k_ra8_sram_sabar_align_mask
b12..b0 must be 0.
static volatile r_sram_cpscu_regs_t * ra8_sram_cpscu_regs(void)
Get pointer to the (Secure) CPSCU SRAM security register block.
@ k_ra8_sram_esar_bit_esa
SRAMESA – ECC region Non-Secure.
@ k_ra8_sram_sar_writable
Union of all defined bits.
@ k_ra8_sram_bank_count
SRAM0, SRAM1, SRAM2, SRAM3.
ra8_err_t ra8_sram_attach_bank_handler(uint8_t bank, ra8_sram_error_fn_t fn, void *ctx)
Attach a per-bank ECC error callback.
ra8_err_t ra8_sram_set_boundary(uint8_t bank, uint32_t offset)
Write SRAMSABARn (per-bank Secure/Non-Secure boundary).
void ra8_sram_dispatch(uint8_t bank, bool is_2bit, uintptr_t err_addr)
Dispatch an ECC error event to the registered handler.
ra8_err_t ra8_sram_attach_handler(ra8_sram_error_fn_t fn, void *ctx)
Attach the global ECC error callback.
ra8_err_t ra8_sram_set_ecc_security(bool non_secure)
Write SRAMESAR (ECC region security).
uint16_t ra8_sram_dispatch_from_esr(ra8_sram_status_t *out_status)
Read SRAMESR + EAR and dispatch every latched flag.
ra8_err_t ra8_sram_set_security(uint32_t sa_mask)
Write SRAMSAR (per-bank register security + WTSC security).
Memory layout of the CPSCU SRAM security window.
volatile uint32_t SRAMSAR
+0x010 SRAM register security.
volatile uint32_t SRAMSABAR[k_ra8_sram_bank_count]
+0x400..+0x40F Bank boundary.
volatile uint32_t SRAMESAR
+0x510 ECC region security.
Snapshot of ECC error state (filled by ra8_sram_get_status).
uintptr_t addr_2bit[k_ra8_sram_bank_count]
Captured 2-bit error address per bank.
uintptr_t addr_1bit[k_ra8_sram_bank_count]
Captured 1-bit error address per bank.
uint16_t raw_esr
Raw SRAMESR value.