main.c

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#include <stddef.h>
#include <stdint.h>
 
#include "ra8_attributes.h"
#include "ra8_board_ek_ra8d2.h"
#include "ra8_boot_entry.h"
#include "ra8_cgc.h"
#include "ra8_err.h"
#include "ra8_isr.h"
#include "ra8_log.h"
#include "ra8_mstp.h"

typedef enum : uint32_t {
  k_fd_uart_baud = 115200U, 
  k_fd_dividend  = 100U,    
  k_fd_divisor   = 0U,      
} fd_consts_t;

typedef enum : uintptr_t {
  k_fd_scb_ccr_addr = 0xE000ED14UL, 
} fd_scb_addr_t;

typedef enum : uint32_t {
  k_fd_ccr_div_0_trp = 1UL << 4, 
} fd_ccr_bits_t;
 
static const uint8_t s_msg_boot[]     = "fault-div0: boot\r\n";
static const uint8_t s_msg_fail[]     = "fault-div0: FAIL init\r\n";
static const uint8_t s_msg_armed[]    = "fault-div0: trap armed\r\n";
static const uint8_t s_msg_unarmed[]  = "fault-div0: FAIL trap not armed\r\n";
static const uint8_t s_msg_survived[] = "fault-div0: survived divide quotient=";
static const uint8_t s_msg_emu_tail[] = " (trap not modelled -- ra8_emulator)\r\n";

static volatile uint32_t s_fd_dividend = (uint32_t)k_fd_dividend;

static volatile uint32_t s_fd_divisor = (uint32_t)k_fd_divisor;

volatile uint32_t g_fd_quotient = 0U;

volatile uint32_t g_fd_heartbeat = 0U;

RA8_INTERNAL static void internal_print(const uint8_t* msg, uint32_t len)
{
  (void)ra8_board_uart_console_write(msg, (size_t)len);
}

RA8_INTERNAL static void internal_log_sink(void* ctx, uint8_t byte)
{
  (void)ctx;
  (void)ra8_board_uart_console_write(&byte, 1U);
}

[[noreturn]] RA8_INTERNAL static void internal_panic_halt(const uint8_t* msg, uint32_t len)
{
  internal_print(msg, len);
  __asm__ volatile("bkpt #0");
  while (1) {
    __asm__ volatile("wfi");
  }
}

RA8_INTERNAL static void internal_print_uint(uint32_t value)
{
  enum : uint32_t {
    k_fd_dec_base   = 10U, 
    k_fd_dec_digits = 10U, 
  };
  uint8_t  buf[k_fd_dec_digits];
  uint32_t n = 0U;
  if (value == 0U) {
    buf[n] = '0';
    n++;
  }
  while ((value > 0U) && (n < (uint32_t)k_fd_dec_digits)) {
    buf[n] = (uint8_t)('0' + (value % (uint32_t)k_fd_dec_base));
    n++;
    value /= (uint32_t)k_fd_dec_base;
  }
  for (uint32_t i = 0U; i < n; i++) {
    internal_print(&buf[n - 1U - i], 1U);
  }
}

RA8_INTERNAL static void internal_setup_or_halt(void)
{
  if (ra8_cgc_init() != k_ra8_ok) {
    internal_panic_halt(s_msg_fail, (uint32_t)sizeof(s_msg_fail) - 1U);
  }
  if (ra8_mstp_init() != k_ra8_ok) {
    internal_panic_halt(s_msg_fail, (uint32_t)sizeof(s_msg_fail) - 1U);
  }
  if (ra8_board_uart_console_init((uint32_t)k_fd_uart_baud) != k_ra8_ok) {
    internal_panic_halt(s_msg_fail, (uint32_t)sizeof(s_msg_fail) - 1U);
  }
}
 
void main(void)
{
  internal_setup_or_halt();
  ra8_isr_globals_enable();
  /* Route the fault handler's ra8_log dump onto the bench console. */
  ra8_log_set_byte_sink(internal_log_sink, nullptr);
  internal_print(s_msg_boot, (uint32_t)sizeof(s_msg_boot) - 1U);
 
  /* Prove the boot-path write landed before relying on it: CCR must
   * read back with DIV_0_TRP set (works on silicon AND ra8_emulator --
   * the fake's SCS window stores the write even though its CPU model
   * ignores it). ARMv8-M SCB->CCR, read-only probe. */
  const uint32_t ccr = *(volatile uint32_t*)k_fd_scb_ccr_addr;
  if ((ccr & (uint32_t)k_fd_ccr_div_0_trp) == 0U) {
    internal_panic_halt(s_msg_unarmed, (uint32_t)sizeof(s_msg_unarmed) - 1U);
  }
  internal_print(s_msg_armed, (uint32_t)sizeof(s_msg_armed) - 1U);
 
  /* The guarded zero-divide. Volatile operands force a run-time UDIV.
   * Silicon: UsageFault here -> decoded dump prints -> halt (the app
   * never reaches the next line). ra8_emulator: quotient 0, fall through. */
  const uint32_t quotient = s_fd_dividend / s_fd_divisor;
 
  g_fd_quotient = quotient;
  internal_print(s_msg_survived, (uint32_t)sizeof(s_msg_survived) - 1U);
  internal_print_uint(quotient);
  internal_print(s_msg_emu_tail, (uint32_t)sizeof(s_msg_emu_tail) - 1U);
 
  while (1) {
    g_fd_heartbeat++;
    __asm__ volatile("wfi");
  }
}