51typedef enum : uint32_t {
64 0x52, 0x49, 0x46, 0x46, 0x2C, 0x00, 0x00, 0x00, 0x57, 0x45, 0x42, 0x50, 0x56,
65 0x50, 0x38, 0x4C, 0x1F, 0x00, 0x00, 0x00, 0x2F, 0x07, 0xC0, 0x01, 0x00, 0xCD,
66 0x65, 0x44, 0xFF, 0x63, 0x17, 0x85, 0x28, 0x78, 0xFF, 0x03, 0x42, 0x02, 0xC2,
67 0x14, 0xFF, 0x77, 0x6A, 0x0E, 0x0C, 0x48, 0xC4, 0x04, 0x80, 0xAD, 0x0D, 0x00,
89 __asm__
volatile(
"wfi");
101 uint32_t cpuclk0_hz = 0U;
void main(void)
Secure fallback main entry point.
static const uint8_t k_webp_lossless[]
8x8 VP8L (lossless, -exact) fixture – see tests/fixtures/webp/README.md.
webp_demo_consts_t
Fixed geometry + buffer sizes for the baked 8x8 fixture.
@ k_webp_demo_bpp
RGBA8888 bytes per pixel.
@ k_webp_demo_probe_r
Expected R at pixel (1,1).
@ k_webp_demo_dim
Fixture width and height.
@ k_webp_demo_scratch
Decode arena, bytes.
@ k_webp_demo_fb_bytes
8x8 RGBA.
@ k_webp_demo_probe_a
Expected A at pixel (1,1).
@ k_webp_demo_baud
Console baud rate.
@ k_webp_demo_stride
Row stride.
static uint8_t s_webp_demo_scratch[k_webp_demo_scratch]
Decode arena backing store (static SRAM, NASA P10 Rule 3).
static void webp_demo_setup_or_halt(void)
Bring CGC + module-stop + SysTick + console up, or panic-halt.
static bool webp_demo_decode_ok(void)
Decode the baked fixture and confirm a known pixel round-trips.
static void webp_demo_panic_halt(void)
Park the CPU forever after a fatal init failure.
static const uint8_t k_webp_demo_pass[]
PASS banner (HIL scrape target).
static uint8_t s_webp_demo_fb[k_webp_demo_fb_bytes]
Decoded RGBA8888 output framebuffer.
static const uint8_t k_webp_demo_fail[]
FAIL banner (HIL scrape target).
Board-support layer for the Renesas EK-RA8D2 v1 evaluation kit.
ra8_err_t ra8_board_uart_console_write(const uint8_t *data, size_t len)
Polled blocking write to the J-Link OB VCOM console.
ra8_err_t ra8_board_uart_console_init(uint32_t baud)
Configure SCI8 + PD02/PD03 as the debug-console UART.
Boot entry points shared between a vector table and its startup code.
High-level Clock Generation Circuit driver.
ra8_err_t ra8_cgc_get_clock_hz(ra8_clock_id_t id, uint32_t *out_hz)
Query the current frequency of a clock-tree domain.
@ k_ra8_clock_id_cpuclk0
Cortex-M85 CPUCLK0.
ra8_err_t ra8_cgc_init(void)
Configure the clock tree to a safe default.
Error Code Definitions for ra8-firmware.
@ k_ra8_ok
Success – operation completed with all postconditions satisfied.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
Ref-counted Module Stop Control wrapper for the RA8D2.
ra8_err_t ra8_mstp_init(void)
Re-establish the ra8_mstp ref-count table from current hardware state.
SysTick-based tick counter, delay and timestamp helpers.
ra8_err_t ra8_time_init(uint32_t cpu_hz)
Initialise SysTick for a 1 kHz tick interrupt.
Zero-heap WebP (VP8 / VP8L) decode facade over the vendored libwebp.
ra8_err_t ra8_webp_decode_rgba(const uint8_t *data, size_t size, ra8_webp_arena_t *arena, uint8_t *out_rgba, size_t out_stride, size_t out_capacity, uint32_t *out_w, uint32_t *out_h)
Decode a WebP into a caller-owned RGBA8888 buffer, heap-free.
Heap-free scratch allocator hooks for the vendored libwebp decoder.
Caller-owned bump arena backing a single WebP decode.