Graphics LCD Controller (GLCDC) framebuffer-descriptor model for ra8_emulator. More...

#include <stdint.h>
#include <stdio.h>
#include "board_periph.h"
#include "board_periph_block.h"
#include "emu_host_io_internal.h"

Include dependency graph for board_periph_glcdc.c:

Data Structures
struct	glcdc_layer_t
	One graphics layer's snooped descriptor registers. More...
struct	glcdc_state_t
	The modelled GLCDC: snooped graphics-layer + background state. More...

Enumerations
enum	glcdc_geom_t : uint64_t { k_glcdc_base = 0x40342000ULL , k_glcdc_span = 0x1500ULL }
	GLCDC register-window geometry (ra8_glcdc_regs.h). More...
enum	glcdc_off_t : uint64_t { k_glcdc_off_bg_en = 0x1000ULL , k_glcdc_off_gr1_flmrd = 0x1104ULL , k_glcdc_off_gr1_saddr = 0x110CULL , k_glcdc_off_gr1_flm3 = 0x1110ULL , k_glcdc_off_gr1_line = 0x1118ULL , k_glcdc_off_gr1_fmt = 0x111CULL , k_glcdc_off_gr2_flmrd = 0x1204ULL , k_glcdc_off_gr2_saddr = 0x120CULL , k_glcdc_off_gr2_flm3 = 0x1210ULL , k_glcdc_off_gr2_line = 0x1218ULL , k_glcdc_off_gr2_fmt = 0x121CULL }
	GLCDC register byte offsets this model snoops (ra8_glcdc_regs.h). More...
enum	glcdc_field_t : uint32_t { k_glcdc_bg_en_bit = (1U << 0U) , k_glcdc_flmrd_renb_bit = (1U << 0U) , k_glcdc_fmt_shift = 28U , k_glcdc_fmt_mask = 0x7U , k_glcdc_stride_shift = 16U , k_glcdc_stride_mask = 0xFFFFU , k_glcdc_lnnum_shift = 16U , k_glcdc_lnnum_mask = 0x7FFU }
	GLCDC register field shifts / masks the decode applies (HUM Ch 63). More...
enum	glcdc_fmt_t : uint8_t { k_glcdc_fmt_argb8888 = 0x0U , k_glcdc_fmt_rgb888 = 0x1U , k_glcdc_fmt_rgb565 = 0x2U , k_glcdc_fmt_argb1555 = 0x3U , k_glcdc_fmt_argb4444 = 0x4U , k_glcdc_fmt_clut8 = 0x5U , k_glcdc_fmt_clut4 = 0x6U , k_glcdc_fmt_clut1 = 0x7U }
	FLM6.FORMAT codes (ra8_glcdc_pixel_fmt_t; HUM Ch 63 Table 63.11). More...
enum	glcdc_bpp_t : uint8_t { k_glcdc_bpp_32 = 4U , k_glcdc_bpp_16 = 2U , k_glcdc_bpp_8 = 1U }
	Bytes-per-pixel per FLM6.FORMAT code (CLUT modes round up to 1). More...
enum	glcdc_ram_window_t : uint32_t { k_glcdc_dtcm_base = 0x20000000U , k_glcdc_dtcm_end = 0x20010000U , k_glcdc_sram_base = 0x22000000U , k_glcdc_sram_end = 0x22200000U , k_glcdc_sdram_base = 0x68000000U , k_glcdc_sdram_end = 0x6C000000U }
	Emulated RAM windows a GLCDC framebuffer may legally live in. More...
enum	glcdc_fnv_t : uint32_t { k_glcdc_fnv_offset = 2166136261U , k_glcdc_fnv_prime = 16777619U }
	FNV-1a-32 constants (match glcdc_render's framebuffer hash). More...
enum	glcdc_bound_t : uint32_t { k_glcdc_read_chunk = 4096U , k_glcdc_max_fb_bytes = 0x800000U , k_glcdc_max_dim = 4096U }
	Bounds for the report-time framebuffer read (NASA Rule 2). More...
enum	glcdc_order_t : uint32_t { k_glcdc_block_order = 165U }
	Per-tick / report order slot for the GLCDC block (after DRW). More...

Functions
static RA8_INTERNAL uint32_t	internal_glcdc_bpp_for_format (uint8_t fmt)
	Bytes per pixel for an FLM6.FORMAT code (HUM Ch 63 Table 63.11).
static RA8_INTERNAL bool	internal_glcdc_addr_is_ram (uint32_t addr)
	True iff `addr` is inside an emulated RAM window a framebuffer uses.
static RA8_INTERNAL bool	internal_glcdc_layer_decode (const glcdc_layer_t layer, uint8_t num, board_glcdc_fb_t out)
	Decode a layer's snooped registers into a framebuffer descriptor.
bool	board_periph_glcdc_get_framebuffer (board_glcdc_fb_t *out)
	Report the active GLCDC graphics-layer framebuffer, if one is programmed.
static RA8_INTERNAL void	internal_glcdc_snoop (uint64_t off, uint32_t value)
	Snoop one register write into the matching layer / BG shadow field.
static RA8_INTERNAL void	internal_glcdc_write (uc_engine *uc, uint64_t addr, unsigned size, uint64_t value)
	MMIO write snoop inside the GLCDC window (observe-only, never owns).
static RA8_INTERNAL uint64_t	internal_glcdc_read (uc_engine *uc, uint64_t addr, unsigned size)
	Read stub: an observe block never owns reads (the sparse model does).
static RA8_INTERNAL void	internal_glcdc_tick (uc_engine *uc)
	Stash the engine each chunk so the report can read framebuffer RAM.
static RA8_INTERNAL void	internal_glcdc_reset (void)
	Clear the GLCDC model on reset / process start.
static RA8_INTERNAL bool	internal_glcdc_hash_framebuffer (const board_glcdc_fb_t fb, uint32_t out_crc)
	FNV-1a-32 over the active framebuffer, read out of emulated RAM.
static RA8_INTERNAL const char *	internal_glcdc_format_name (uint8_t fmt)
	Human label for an FLM6.FORMAT code.
static RA8_INTERNAL void	internal_glcdc_report (void)
	End-of-run GLCDC section: the active framebuffer + its content hash.
static RA8_INTERNAL void	internal_glcdc_block_register (void)
	Register the GLCDC block before main (host constructor).

Variables
static glcdc_state_t	s_glcdc
static const board_periph_block_t	s_k_glcdc_block
	GLCDC block descriptor: observe-only snoop over the register window.

Detailed Description

Graphics LCD Controller (GLCDC) framebuffer-descriptor model for ra8_emulator.

Models the RA8D2 GLCDC display controller (ra8_glcdc_regs.h, ra8_glcdc.c) at 0x40342000 so the display / e-reader example family can be inspected headlessly: the model snoops the graphics-layer register writes the driver emits and recovers WHERE the scanned-out framebuffer lives in emulated memory and HOW to read it (base, width, height, line stride, pixel format). That descriptor is published through board_periph_glcdc_get_framebuffer so a smoke harness can pull the rendered pixels out of modelled RAM – on-chip SRAM or external SDRAM at 0x68000000 – and checksum them, and the end-of-run report folds an FNV-1a-32 over the framebuffer itself so the rendered image has a deterministic, greppable witness.

Observe-only, not owning.: Unlike every other board_periph block, the GLCDC block is registered with observe = true (see board_periph_block.h). main.c's panel compositor (build_frame, behind --ppm / --view) already reads the GLCDC GR1 registers back from the emulator's sparse MMIO shadow to build the display frame. An OWNING block would divert the firmware's GLCDC register writes away from that shadow and the compositor would blank, regressing the --ppm render gate. So this block SNOOPS instead: the core still routes each GLCDC write here (so the descriptor decode sees the full stream) but reports the access "not handled", leaving the sparse model to serve reads and record writes exactly as before. The block's read handler is therefore never called and is a stub.

What is decoded (HUM Ch 63 "Graphics LCD Controller (GLCDC)").: The driver programs each graphics layer GR1 (offset 0x1100) / GR2 (0x1200) with FLM2.BASE (framebuffer address), FLM3.LNOFF (line stride in bytes), FLM5.LNNUM (lines - 1), FLM6.FORMAT (pixel format), and flips FLMRD.RENB to start fetching; the background plane BG (0x1000) carries the BG_EN output-stage enable and BG_BGC. The model shadows that subset and presents the active layer's framebuffer: GR1 when its FLMRD is set (the upper layer the e-reader and glcdc_render draw into), otherwise GR2.

Copyright: Copyright (c) 2026 Brighton Sikarskie SPDX-License-Identifier: MIT

Since: 0.1.0

Definition in file board_periph_glcdc.c.

Enumeration Type Documentation

◆ glcdc_bound_t

enum glcdc_bound_t : uint32_t

Bounds for the report-time framebuffer read (NASA Rule 2).

Enumerator
k_glcdc_read_chunk	uc_mem_read batch size, bytes.
k_glcdc_max_fb_bytes	8 MiB cap on a hashed framebuffer.
k_glcdc_max_dim	Sanity cap on decoded width/height.

Definition at line 129 of file board_periph_glcdc.c.

◆ glcdc_bpp_t

enum glcdc_bpp_t : uint8_t

Bytes-per-pixel per FLM6.FORMAT code (CLUT modes round up to 1).

Enumerator
k_glcdc_bpp_32	ARGB8888 / RGB888 fetch width.
k_glcdc_bpp_16	RGB565 / ARGB1555 / ARGB4444.
k_glcdc_bpp_8	CLUT8 / CLUT4 / CLUT1 (rounded).

Definition at line 106 of file board_periph_glcdc.c.

◆ glcdc_field_t

enum glcdc_field_t : uint32_t

GLCDC register field shifts / masks the decode applies (HUM Ch 63).

Enumerator
k_glcdc_bg_en_bit	BG_EN.EN: background operation on.
k_glcdc_flmrd_renb_bit	FLMRD.RENB: framebuffer read enable.
k_glcdc_fmt_shift	FLM6.FORMAT[30:28].
k_glcdc_fmt_mask	FORMAT field width (3 bits).
k_glcdc_stride_shift	FLM3.LNOFF lives in bits [31:16].
k_glcdc_stride_mask	FLM3.LNOFF is 16 bits.
k_glcdc_lnnum_shift	FLM5.LNNUM lives in bits [26:16].
k_glcdc_lnnum_mask	FLM5.LNNUM is 11 bits.

Definition at line 82 of file board_periph_glcdc.c.

◆ glcdc_fmt_t

enum glcdc_fmt_t : uint8_t

FLM6.FORMAT codes (ra8_glcdc_pixel_fmt_t; HUM Ch 63 Table 63.11).

Enumerator
k_glcdc_fmt_argb8888	32-bit ARGB.
k_glcdc_fmt_rgb888	24-bit RGB.
k_glcdc_fmt_rgb565	16-bit RGB565.
k_glcdc_fmt_argb1555	16-bit ARGB1555.
k_glcdc_fmt_argb4444	16-bit ARGB4444.
k_glcdc_fmt_clut8	8-bit CLUT.
k_glcdc_fmt_clut4	4-bit CLUT.
k_glcdc_fmt_clut1	1-bit CLUT.

Definition at line 94 of file board_periph_glcdc.c.

◆ glcdc_fnv_t

enum glcdc_fnv_t : uint32_t

FNV-1a-32 constants (match glcdc_render's framebuffer hash).

Enumerator
k_glcdc_fnv_offset	FNV-1a-32 offset basis.
k_glcdc_fnv_prime	FNV-1a-32 prime.

Definition at line 123 of file board_periph_glcdc.c.

◆ glcdc_geom_t

enum glcdc_geom_t : uint64_t

GLCDC register-window geometry (ra8_glcdc_regs.h).

Enumerator
k_glcdc_base	GLCDC block base (HUM Ch 63).
k_glcdc_span	Covers CLUTs..SYSCNT_PANEL_CLK 0x1450.

Definition at line 52 of file board_periph_glcdc.c.

◆ glcdc_off_t

enum glcdc_off_t : uint64_t

GLCDC register byte offsets this model snoops (ra8_glcdc_regs.h).

The subset of the GR1 / GR2 graphics-layer and BG background-plane registers the framebuffer-descriptor decode needs. Names mirror FSP's R_GLCDC_Type field names so a reader can cross-reference HUM Ch 63 directly.

Enumerator
k_glcdc_off_bg_en	BG.EN.EN: output stage enable.
k_glcdc_off_gr1_flmrd	GR[0].FLMRD.RENB: framebuffer read.
k_glcdc_off_gr1_saddr	GR[0].FLM2.BASE: framebuffer addr.
k_glcdc_off_gr1_flm3	GR[0].FLM3.LNOFF: line stride bytes.
k_glcdc_off_gr1_line	GR[0].FLM5: LNNUM (lines - 1).
k_glcdc_off_gr1_fmt	GR[0].FLM6.FORMAT: pixel format.
k_glcdc_off_gr2_flmrd	GR[1].FLMRD.RENB.
k_glcdc_off_gr2_saddr	GR[1].FLM2.BASE.
k_glcdc_off_gr2_flm3	GR[1].FLM3.LNOFF.
k_glcdc_off_gr2_line	GR[1].FLM5.
k_glcdc_off_gr2_fmt	GR[1].FLM6.FORMAT.

Definition at line 65 of file board_periph_glcdc.c.

◆ glcdc_order_t

enum glcdc_order_t : uint32_t

Per-tick / report order slot for the GLCDC block (after DRW).

Enumerator
k_glcdc_block_order	After DRW (160), before SRAM-ECC (176).

Definition at line 507 of file board_periph_glcdc.c.

◆ glcdc_ram_window_t

enum glcdc_ram_window_t : uint32_t

Emulated RAM windows a GLCDC framebuffer may legally live in.

Enumerator
k_glcdc_dtcm_base	Data TCM start.
k_glcdc_dtcm_end	Data TCM end.
k_glcdc_sram_base	On-chip SRAM start.
k_glcdc_sram_end	On-chip SRAM end.
k_glcdc_sdram_base	External SDRAM start.
k_glcdc_sdram_end	External SDRAM end.

Definition at line 113 of file board_periph_glcdc.c.

Function Documentation

◆ board_periph_glcdc_get_framebuffer()

bool board_periph_glcdc_get_framebuffer ( board_glcdc_fb_t * out )

Report the active GLCDC graphics-layer framebuffer, if one is programmed.

Reads the descriptor the GLCDC model snooped from the firmware's graphics-layer register writes (GR1 preferred; GR2 if only it is enabled). Lets a ra8_emulator harness locate and checksum the rendered framebuffer in emulated memory without re-deriving the layout from raw registers. The pixels themselves are read with uc_mem_read at base; this only returns the layout.

Parameters

[out] out Receives the active framebuffer descriptor on success; left unchanged when no layer is programmed. Ignored if NULL.

Returns: true when a graphics layer has a framebuffer programmed (and out was written), false otherwise.

Postcondition: On true, out->base points into a modelled RAM window.; On false, out is untouched.

Note: Not thread-safe; single-threaded run-loop / report use.

Since: 0.1.0

Return values

true	The board periph glcdc get framebuffer condition holds or completed successfully; false otherwise.

Precondition: Arguments satisfy the ranges documented for board periph glcdc get framebuffer.; The call executes on the emulator's single owning thread.

Definition at line 253 of file board_periph_glcdc.c.

References internal_glcdc_layer_decode(), and s_glcdc.

Referenced by internal_glcdc_report().

◆ internal_glcdc_addr_is_ram()

RA8_INTERNAL bool internal_glcdc_addr_is_ram ( uint32_t addr )

static

True iff addr is inside an emulated RAM window a framebuffer uses.

True iff addr is inside an emulated ram window a framebuffer uses; this step is contained within the board periph glcdc model and uses bounded caller or module-owned storage.

Parameters

[in] addr Guest address involved in the operation.

Returns: The glcdc addr is ram result produced by the board periph glcdc model.

Return values

true	The glcdc addr is ram condition holds or completed successfully; false otherwise.

Precondition: Arguments satisfy the ranges documented for glcdc addr is ram.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph glcdc model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 191 of file board_periph_glcdc.c.

References k_glcdc_dtcm_base, k_glcdc_dtcm_end, k_glcdc_sdram_base, k_glcdc_sdram_end, k_glcdc_sram_base, k_glcdc_sram_end, and RA8_INTERNAL.

Referenced by internal_glcdc_layer_decode().

◆ internal_glcdc_block_register()

RA8_INTERNAL void internal_glcdc_block_register ( void )

static

Register the GLCDC block before main (host constructor).

Definition at line 526 of file board_periph_glcdc.c.

References board_periph_register_block(), RA8_INTERNAL, and s_k_glcdc_block.

◆ internal_glcdc_bpp_for_format()

RA8_INTERNAL uint32_t internal_glcdc_bpp_for_format ( uint8_t fmt )

static

Bytes per pixel for an FLM6.FORMAT code (HUM Ch 63 Table 63.11).

Bytes per pixel for an flm6.format code (hum ch 63 table 63.11); this step is contained within the board periph glcdc model and uses bounded caller or module-owned storage.

Parameters

[in] fmt Fmt input used by the operation.

Returns: The glcdc bpp for format result produced by the board periph glcdc model.

Return values

value The operation-specific glcdc bpp for format value.

Precondition: Arguments satisfy the ranges documented for glcdc bpp for format.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph glcdc model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 165 of file board_periph_glcdc.c.

References k_glcdc_bpp_16, k_glcdc_bpp_32, k_glcdc_bpp_8, k_glcdc_fmt_argb1555, k_glcdc_fmt_argb4444, k_glcdc_fmt_argb8888, k_glcdc_fmt_rgb565, k_glcdc_fmt_rgb888, and RA8_INTERNAL.

Referenced by internal_glcdc_hash_framebuffer(), and internal_glcdc_layer_decode().

◆ internal_glcdc_format_name()

RA8_INTERNAL const char * internal_glcdc_format_name ( uint8_t fmt )

static

Human label for an FLM6.FORMAT code.

Definition at line 449 of file board_periph_glcdc.c.

References k_glcdc_fmt_argb1555, k_glcdc_fmt_argb4444, k_glcdc_fmt_argb8888, k_glcdc_fmt_rgb565, k_glcdc_fmt_rgb888, and RA8_INTERNAL.

Referenced by internal_glcdc_report().

◆ internal_glcdc_hash_framebuffer()

RA8_INTERNAL bool internal_glcdc_hash_framebuffer	(	const board_glcdc_fb_t *	fb,
		uint32_t *	out_crc )

static

FNV-1a-32 over the active framebuffer, read out of emulated RAM.

Fnv-1a-32 over the active framebuffer, read out of emulated ram; this step is contained within the board periph glcdc model and uses bounded caller or module-owned storage.

Parameters

[in]	fb	Fb input used by the operation.
[out]	out_crc	Destination receiving the out crc result.

Returns: The glcdc hash framebuffer result produced by the board periph glcdc model.

Return values

true	The glcdc hash framebuffer condition holds or completed successfully; false otherwise.

Precondition: Arguments satisfy the ranges documented for glcdc hash framebuffer.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph glcdc model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 411 of file board_periph_glcdc.c.

References board_glcdc_fb_t::base, emu_mem_read(), board_glcdc_fb_t::format, board_glcdc_fb_t::height, internal_glcdc_bpp_for_format(), k_glcdc_fnv_offset, k_glcdc_fnv_prime, k_glcdc_max_fb_bytes, k_glcdc_read_chunk, RA8_INTERNAL, s_glcdc, board_glcdc_fb_t::stride, and board_glcdc_fb_t::width.

Referenced by internal_glcdc_report().

◆ internal_glcdc_layer_decode()

RA8_INTERNAL bool internal_glcdc_layer_decode	(	const glcdc_layer_t *	layer,
		uint8_t	num,
		board_glcdc_fb_t *	out )

static

Decode a layer's snooped registers into a framebuffer descriptor.

Recovers the descriptor from the FSP-documented field layout: width is the line stride divided by the format's bytes-per-pixel, height is FLM5.LNNUM + 1, the format is FLM6.FORMAT[30:28]. Reports the layer "programmed" only when its FLMRD is set, its base points into a modelled RAM window, and the stride / dimensions are sane – the same gate board_periph_glcdc_get_framebuffer and the report apply.

Parameters

[in]	layer	One graphics layer's snooped registers.
[in]	num	Layer number to stamp into `out->layer` (1 or 2).
[out]	out	Receives the descriptor when the layer is programmed.

Returns: true when layer carries a usable framebuffer (and out written).

Return values

true	Layer programmed; `out` holds base / dims / stride / format.
false	Layer idle or its registers are not framebuffer-sane.

Precondition: out is non-NULL.; num is 1 or 2.

Postcondition: On true, out->base is in a modelled RAM window.; On false, out is left unchanged.

Note: Pure decode; touches no emulated memory.

Since: 0.1.0

Definition at line 225 of file board_periph_glcdc.c.

References board_glcdc_fb_t::base, board_glcdc_fb_t::enabled, glcdc_layer_t::flm3, glcdc_layer_t::flm5, glcdc_layer_t::flmrd, glcdc_layer_t::fmt, board_glcdc_fb_t::format, board_glcdc_fb_t::height, internal_glcdc_addr_is_ram(), internal_glcdc_bpp_for_format(), k_glcdc_fmt_mask, k_glcdc_fmt_shift, k_glcdc_lnnum_mask, k_glcdc_lnnum_shift, k_glcdc_max_dim, k_glcdc_stride_mask, k_glcdc_stride_shift, board_glcdc_fb_t::layer, s_glcdc, glcdc_layer_t::saddr, board_glcdc_fb_t::stride, and board_glcdc_fb_t::width.

Referenced by board_periph_glcdc_get_framebuffer().

◆ internal_glcdc_read()

RA8_INTERNAL uint64_t internal_glcdc_read	(	uc_engine *	uc,
		uint64_t	addr,
		unsigned	size )

static

Read stub: an observe block never owns reads (the sparse model does).

Read stub: an observe block never owns reads (the sparse model does); this step is contained within the board periph glcdc model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	addr	Guest address involved in the operation.
[in]	size	Size of the requested region or access in bytes.

Returns: The glcdc read result produced by the board periph glcdc model.

Return values

value The operation-specific glcdc read value.

Precondition: Arguments satisfy the ranges documented for glcdc read.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph glcdc model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 364 of file board_periph_glcdc.c.

References RA8_INTERNAL.

◆ internal_glcdc_report()

RA8_INTERNAL void internal_glcdc_report ( void )

static

End-of-run GLCDC section: the active framebuffer + its content hash.

End-of-run glcdc section: the active framebuffer + its content hash; this step is contained within the board periph glcdc model and uses bounded caller or module-owned storage.

Precondition: Arguments satisfy the ranges documented for glcdc report.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph glcdc model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 475 of file board_periph_glcdc.c.

References board_glcdc_fb_t::base, board_periph_glcdc_get_framebuffer(), board_glcdc_fb_t::enabled, board_glcdc_fb_t::format, board_glcdc_fb_t::height, internal_glcdc_format_name(), internal_glcdc_hash_framebuffer(), board_glcdc_fb_t::layer, priv_emu_io_errf(), RA8_INTERNAL, board_glcdc_fb_t::stride, and board_glcdc_fb_t::width.

◆ internal_glcdc_reset()

RA8_INTERNAL void internal_glcdc_reset ( void )

static

Clear the GLCDC model on reset / process start.

Clear the glcdc model on reset / process start; this step is contained within the board periph glcdc model and uses bounded caller or module-owned storage.

Precondition: Arguments satisfy the ranges documented for glcdc reset.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph glcdc model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 394 of file board_periph_glcdc.c.

References RA8_INTERNAL, and s_glcdc.

◆ internal_glcdc_snoop()

RA8_INTERNAL void internal_glcdc_snoop	(	uint64_t	off,
		uint32_t	value )

static

Snoop one register write into the matching layer / BG shadow field.

Snoop one register write into the matching layer / bg shadow field; this step is contained within the board periph glcdc model and uses bounded caller or module-owned storage.

Parameters

[in]	off	Register or byte offset addressed by the operation.
[in]	value	Register or payload value involved in the operation.

Precondition: Arguments satisfy the ranges documented for glcdc snoop.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph glcdc model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 276 of file board_periph_glcdc.c.

References k_glcdc_bg_en_bit, k_glcdc_flmrd_renb_bit, k_glcdc_off_bg_en, k_glcdc_off_gr1_flm3, k_glcdc_off_gr1_flmrd, k_glcdc_off_gr1_fmt, k_glcdc_off_gr1_line, k_glcdc_off_gr1_saddr, k_glcdc_off_gr2_flm3, k_glcdc_off_gr2_flmrd, k_glcdc_off_gr2_fmt, k_glcdc_off_gr2_line, k_glcdc_off_gr2_saddr, RA8_INTERNAL, and s_glcdc.

Referenced by internal_glcdc_write().

◆ internal_glcdc_tick()

RA8_INTERNAL void internal_glcdc_tick ( uc_engine * uc )

static

Stash the engine each chunk so the report can read framebuffer RAM.

Stash the engine each chunk so the report can read framebuffer ram; this step is contained within the board periph glcdc model and uses bounded caller or module-owned storage.

Parameters

[in,out] uc Unicorn engine whose emulated state is read or updated.

Precondition: Arguments satisfy the ranges documented for glcdc tick.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph glcdc model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 381 of file board_periph_glcdc.c.

References RA8_INTERNAL, and s_glcdc.

◆ internal_glcdc_write()

RA8_INTERNAL void internal_glcdc_write	(	uc_engine *	uc,
		uint64_t	addr,
		unsigned	size,
		uint64_t	value )

static

MMIO write snoop inside the GLCDC window (observe-only, never owns).

MMIO write snoop inside the glcdc window (observe-only, never owns); this step is contained within the board periph glcdc model and uses bounded caller or module-owned storage.

Parameters

[in,out]	uc	Unicorn engine whose emulated state is read or updated.
[in]	addr	Guest address involved in the operation.
[in]	size	Size of the requested region or access in bytes.
[in]	value	Register or payload value involved in the operation.

Precondition: Arguments satisfy the ranges documented for glcdc write.; The call executes on the emulator's single owning thread.

Postcondition: State changes remain confined to the board periph glcdc model and documented output objects.; Ownership of caller-supplied storage is unchanged.

Note: The operation is synchronous and does not transfer heap ownership.

Since: 0.1.0

Definition at line 344 of file board_periph_glcdc.c.

References internal_glcdc_snoop(), k_glcdc_base, and s_glcdc.

Variable Documentation

◆ s_glcdc

glcdc_state_t s_glcdc

static

Definition at line 152 of file board_periph_glcdc.c.

Referenced by board_periph_glcdc_get_framebuffer(), internal_glcdc_hash_framebuffer(), internal_glcdc_layer_decode(), internal_glcdc_reset(), internal_glcdc_snoop(), internal_glcdc_tick(), and internal_glcdc_write().

◆ s_k_glcdc_block

const board_periph_block_t s_k_glcdc_block

static

Initial value:

                                                  = {
  .base    = (uint64_t)k_glcdc_base,
  .span    = (uint64_t)k_glcdc_span,
  .order   = (uint32_t)k_glcdc_block_order,
  .read    = internal_glcdc_read,
  .write   = internal_glcdc_write,
  .tick    = internal_glcdc_tick,
  .reset   = internal_glcdc_reset,
  .report  = internal_glcdc_report,
  .name    = "GLCDC",
  .observe = true,
}

GLCDC block descriptor: observe-only snoop over the register window.

Definition at line 512 of file board_periph_glcdc.c.

Referenced by internal_glcdc_block_register().

Data Structures

Enumerations

Functions

Variables

Detailed Description

Enumeration Type Documentation

◆ glcdc_bound_t

◆ glcdc_bpp_t

◆ glcdc_field_t

◆ glcdc_fmt_t

◆ glcdc_fnv_t

◆ glcdc_geom_t

◆ glcdc_off_t

◆ glcdc_order_t

◆ glcdc_ram_window_t

Function Documentation

◆ board_periph_glcdc_get_framebuffer()

◆ internal_glcdc_addr_is_ram()

◆ internal_glcdc_block_register()

◆ internal_glcdc_bpp_for_format()

◆ internal_glcdc_format_name()

◆ internal_glcdc_hash_framebuffer()

◆ internal_glcdc_layer_decode()

◆ internal_glcdc_read()

◆ internal_glcdc_report()

◆ internal_glcdc_reset()

◆ internal_glcdc_snoop()

◆ internal_glcdc_tick()

◆ internal_glcdc_write()

Variable Documentation

◆ s_glcdc

◆ s_k_glcdc_block