ra8_rmac_config_t Struct Reference

Per-port RMAC configuration knobs. More...

#include <ra8_rmac.h>

Data Fields
ra8_rmac_mrafc_t	rx_filter
	Initial MRAFC mask.
uint32_t	err_irq_enable
	Bits to OR into MEIE on init.
uint32_t	mon0_irq_enable
	Bits to OR into MMIE0.
uint32_t	mon1_irq_enable
	Bits to OR into MMIE1.
uint32_t	mon2_irq_enable
	Bits to OR into MMIE2.
ra8_rmac_pis_t	phy_interface
	Initial MPIC.PIS encoding.
ra8_rmac_lsc_t	link_speed
	Initial MPIC.LSC encoding.
ra8_rmac_duplex_t	duplex
	Initial MPIC.PIPP encoding.
uint32_t	eswclk_hz
	Live ESWCLK frequency in Hz (input to the MDC divider).
uint32_t	mdc_hz
	Target MDC (PHY station-management clock) frequency in Hz.

Detailed Description

Per-port RMAC configuration knobs.

Captured by ra8_rmac_init. All fields default to safe values when zero-initialized: 100-Mbit MII full-duplex, unicast-only filter, no IRQs enabled, no PFC, no EEE.

Definition at line 120 of file ra8_rmac.h.

Field Documentation

duplex

ra8_rmac_duplex_t ra8_rmac_config_t::duplex

Initial MPIC.PIPP encoding.

Definition at line 128 of file ra8_rmac.h.

Referenced by internal_program_mac_config().

err_irq_enable

uint32_t ra8_rmac_config_t::err_irq_enable

Bits to OR into MEIE on init.

Definition at line 122 of file ra8_rmac.h.

Referenced by internal_program_irq_block().

eswclk_hz

uint32_t ra8_rmac_config_t::eswclk_hz

Live ESWCLK frequency in Hz (input to the MDC divider).

Used together with ::mdc_hz to program MPIC.PSMCS. Must equal the frequency actually delivered by ESWCKCR/ESWCKDIVCR after ra8_cgc_eswclk_init runs. A value of 0 falls back to a safe "PSMCS = max" code (slowest MDC).

Definition at line 138 of file ra8_rmac.h.

Referenced by internal_program_mac_config().

link_speed

ra8_rmac_lsc_t ra8_rmac_config_t::link_speed

Initial MPIC.LSC encoding.

Definition at line 127 of file ra8_rmac.h.

Referenced by internal_program_mac_config(), and ra8_rmac_init().

mdc_hz

uint32_t ra8_rmac_config_t::mdc_hz

Target MDC (PHY station-management clock) frequency in Hz.

IEEE 802.3 Clause 22 caps MDC at 2.5 MHz; most PHYs (including the GPY111 / PEF7071 on the EK-RA8D2) work happily at 1 MHz. A value of 0 falls back to k_ra8_rmac_mdc_default_hz (1 MHz).

Definition at line 147 of file ra8_rmac.h.

Referenced by internal_program_mac_config().

mon0_irq_enable

uint32_t ra8_rmac_config_t::mon0_irq_enable

Bits to OR into MMIE0.

Definition at line 123 of file ra8_rmac.h.

Referenced by internal_program_irq_block().

mon1_irq_enable

uint32_t ra8_rmac_config_t::mon1_irq_enable

Bits to OR into MMIE1.

Definition at line 124 of file ra8_rmac.h.

Referenced by internal_program_irq_block().

mon2_irq_enable

uint32_t ra8_rmac_config_t::mon2_irq_enable

Bits to OR into MMIE2.

Definition at line 125 of file ra8_rmac.h.

Referenced by internal_program_irq_block().

phy_interface

ra8_rmac_pis_t ra8_rmac_config_t::phy_interface

Initial MPIC.PIS encoding.

Definition at line 126 of file ra8_rmac.h.

Referenced by internal_program_mac_config(), and ra8_rmac_init().

rx_filter

ra8_rmac_mrafc_t ra8_rmac_config_t::rx_filter

Initial MRAFC mask.

Definition at line 121 of file ra8_rmac.h.

Referenced by internal_program_mac_config(), and ra8_rmac_init().

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The documentation for this struct was generated from the following file:

• libs/ra8_hal/inc/ra8_rmac.h