ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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ra8_pdg_delay_entry_t Struct Reference

Single-edge descriptor for the batch update API. More...

#include <ra8_pdg.h>

Data Fields

uint8_t channel
 0..3.
ra8_pdg_pin_t pin
 k_ra8_pdg_pin_a / k_ra8_pdg_pin_b.
ra8_pdg_edge_t edge
 Rising or falling.
uint8_t code
 DLY[6:0] code, 0..0x7F.

Detailed Description

Single-edge descriptor for the batch update API.

A flat array of these is handed to ra8_pdg_set_delay_batch which writes them all under one critical section so the temporary registers stay coherent until the next GPT overflow / underflow / trough (HUM Ch 23.3.2 Figure 23.3 p 1161).

Definition at line 211 of file ra8_pdg.h.

Field Documentation

◆ channel

uint8_t ra8_pdg_delay_entry_t::channel

0..3.

Definition at line 212 of file ra8_pdg.h.

◆ code

uint8_t ra8_pdg_delay_entry_t::code

DLY[6:0] code, 0..0x7F.

Definition at line 215 of file ra8_pdg.h.

◆ edge

ra8_pdg_edge_t ra8_pdg_delay_entry_t::edge

Rising or falling.

Definition at line 214 of file ra8_pdg.h.

◆ pin

ra8_pdg_pin_t ra8_pdg_delay_entry_t::pin

k_ra8_pdg_pin_a / k_ra8_pdg_pin_b.

Definition at line 213 of file ra8_pdg.h.


The documentation for this struct was generated from the following file: