Memory-mapped layout of the IWDT block. More...

#include <ra8_iwdt_regs.h>

Data Fields
volatile uint8_t	IWDTRR
	+0x00 Refresh register.
volatile uint8_t	_r0
	+0x01 Reserved.
volatile uint16_t	IWDTCR
	+0x02 Control register.
volatile uint16_t	IWDTSR
	+0x04 Status register.
volatile uint8_t	IWDTRCR
	+0x06 Reset control register.
volatile uint8_t	_r1
	+0x07 Reserved.
volatile uint8_t	IWDTCSTPR
	+0x08 Count-stop control register.
volatile uint8_t	_r2
	+0x09 Reserved.
volatile uint16_t	_r3
	+0x0A Reserved (pads to 0x0C).

Detailed Description

Memory-mapped layout of the IWDT block.

Matches FSP R_IWDT_Type (R7KA8D2KF_core0.h) byte-for-byte. The total size is 12 bytes (0x0C). All reserved bytes are named _rN so a debugger / static analyzer can see exactly which bytes are implementation-padding.

The struct is over-decorated on purpose: the IWDTCR / IWDTRCR / IWDTCSTPR registers are read-only-after-OFS0-boot on RA8D2 (no register-start mode), but exposing them lets debuggers and unit tests inspect the silicon view without a custom CMSIS dump.

See also: HUM Ch 28.2 "Register Descriptions" p 1273.

Definition at line 211 of file ra8_iwdt_regs.h.

Field Documentation

◆ _r0

volatile uint8_t r_iwdt_regs_t::_r0

+0x01 Reserved.

Definition at line 214 of file ra8_iwdt_regs.h.

◆ _r1

volatile uint8_t r_iwdt_regs_t::_r1

+0x07 Reserved.

Definition at line 218 of file ra8_iwdt_regs.h.

◆ _r2

volatile uint8_t r_iwdt_regs_t::_r2

+0x09 Reserved.

Definition at line 220 of file ra8_iwdt_regs.h.

◆ _r3

volatile uint16_t r_iwdt_regs_t::_r3

+0x0A Reserved (pads to 0x0C).

Definition at line 221 of file ra8_iwdt_regs.h.

◆ IWDTCR

volatile uint16_t r_iwdt_regs_t::IWDTCR

+0x02 Control register.

Definition at line 215 of file ra8_iwdt_regs.h.

◆ IWDTCSTPR

volatile uint8_t r_iwdt_regs_t::IWDTCSTPR

+0x08 Count-stop control register.

Definition at line 219 of file ra8_iwdt_regs.h.

◆ IWDTRCR

volatile uint8_t r_iwdt_regs_t::IWDTRCR

+0x06 Reset control register.

Definition at line 217 of file ra8_iwdt_regs.h.

◆ IWDTRR

volatile uint8_t r_iwdt_regs_t::IWDTRR

+0x00 Refresh register.

Definition at line 213 of file ra8_iwdt_regs.h.

Referenced by ra8_iwdt_refresh().

◆ IWDTSR

volatile uint16_t r_iwdt_regs_t::IWDTSR

+0x04 Status register.

Definition at line 216 of file ra8_iwdt_regs.h.

Referenced by ra8_iwdt_clear_status(), and ra8_iwdt_dispatch().

The documentation for this struct was generated from the following file:

libs/ra8_hal/inc/ra8_iwdt_regs.h

Data Fields