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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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Per-NMI-unit register window (3 x 32-bit at +0x10 stride). More...
#include <ra8_ipc_regs.h>
Data Fields | |
| volatile uint32_t | NMISTA |
| +0x00 NMI status (R). | |
| volatile uint32_t | NMISET |
| +0x04 NMI set (W). | |
| volatile uint32_t | NMICLR |
| +0x08 NMI clear (W). | |
| volatile uint32_t | _pad |
| +0x0C padding to next unit. | |
Per-NMI-unit register window (3 x 32-bit at +0x10 stride).
Layout matches IPC0NMISTA..IPC0NMICLR at +0x080 documented in HUM Ch 3.2.4..3.2.6 / 3.2.7..3.2.9 p 210-213, mirrored at +0x090 for IPC1.
Definition at line 375 of file ra8_ipc_regs.h.
| volatile uint32_t r_ipc_nmi_regs_t::_pad |
+0x0C padding to next unit.
Definition at line 379 of file ra8_ipc_regs.h.
| volatile uint32_t r_ipc_nmi_regs_t::NMICLR |
+0x08 NMI clear (W).
Definition at line 378 of file ra8_ipc_regs.h.
Referenced by ra8_ipc_dispatch_nmi(), and ra8_ipc_nmi_clear().
| volatile uint32_t r_ipc_nmi_regs_t::NMISET |
| volatile uint32_t r_ipc_nmi_regs_t::NMISTA |
+0x00 NMI status (R).
Definition at line 376 of file ra8_ipc_regs.h.
Referenced by ra8_ipc_dispatch_nmi(), and ra8_ipc_nmi_get_status().