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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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Modelled IPC state: per-channel IRQ bits + FIFOs plus run counters. More...
Data Fields | |
| uint32_t | sta [k_ipc_ch_count] |
| Per-channel STA pending-IRQ shadow. | |
| ipc_fifo_t | fifo [k_ipc_ch_count] |
| Per-channel 4-stage message FIFO. | |
| uint32_t | sends |
| ISET writes that latched IRQ bits. | |
| uint32_t | wakes |
| Receiving-core ELC events raised. | |
| uint32_t | pushes |
| TXD words accepted into a FIFO. | |
| uint32_t | pops |
| RXD words drained from a FIFO. | |
Modelled IPC state: per-channel IRQ bits + FIFOs plus run counters.
sta mirrors each channel's STA pending-IRQ field and fifo its 4-stage message FIFO; sends, wakes, pushes and pops are diagnostics for the end-of-run report.
sta entry are ever set. Definition at line 131 of file board_periph_ipc.c.
| ipc_fifo_t ipc_state_t::fifo[k_ipc_ch_count] |
Per-channel 4-stage message FIFO.
Definition at line 133 of file board_periph_ipc.c.
| uint32_t ipc_state_t::pops |
RXD words drained from a FIFO.
Definition at line 137 of file board_periph_ipc.c.
| uint32_t ipc_state_t::pushes |
TXD words accepted into a FIFO.
Definition at line 136 of file board_periph_ipc.c.
| uint32_t ipc_state_t::sends |
ISET writes that latched IRQ bits.
Definition at line 134 of file board_periph_ipc.c.
| uint32_t ipc_state_t::sta[k_ipc_ch_count] |
Per-channel STA pending-IRQ shadow.
Definition at line 132 of file board_periph_ipc.c.
| uint32_t ipc_state_t::wakes |
Receiving-core ELC events raised.
Definition at line 135 of file board_periph_ipc.c.