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ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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Module-stop (MSTP) shadow + address->bit gate table (engine-free half). More...
#include <stdint.h>#include "board_periph_mstp_internal.h"#include "ra8_attributes.h"#include "ra8_mstp_regs.h"Go to the source code of this file.
Data Structures | |
| struct | mstp_family_t |
| One strided family of peripheral instances sharing a mapping shape. More... | |
Enumerations | |
| enum | mstp_dim_t : uint32_t { k_mstp_reg_count = 5U , k_mstp_bytes_per_reg = 4U , k_mstp_byte_bits = 8U , k_mstp_byte_mask = 0xFFU , k_mstp_id_reg_shift = 8U , k_mstp_id_bit_mask = 0xFFU } |
| Shadow-array dimensions + bit-field packing constants. More... | |
| enum | mstp_reset_t : uint32_t { k_mstp_reset_a = 0xFFFFFFF0U , k_mstp_reset_rest = 0xFFFFFFFFU } |
| Per-register reset values: all peripheral bits stopped (HUM 11.2.6). More... | |
| enum | mstp_family_base_t : uint64_t { k_mstp_base_sci = 0x40358000UL , k_mstp_base_spi = 0x4035C000UL , k_mstp_base_riic = 0x4025E000UL , k_mstp_base_i3c = 0x4035F000UL , k_mstp_base_agt = 0x40221000UL , k_mstp_base_gpt = 0x40322000UL , k_mstp_base_ulpt = 0x40220000UL , k_mstp_base_dac = 0x40233000UL , k_mstp_base_ssie = 0x4025D000UL , k_mstp_base_poeg = 0x40212000UL , k_mstp_base_canfd0 = 0x40380000UL , k_mstp_base_canfd1 = 0x40382000UL , k_mstp_base_cac = 0x40202400UL , k_mstp_base_crc = 0x40310000UL , k_mstp_base_doc = 0x40311000UL , k_mstp_base_ceu = 0x40348000UL , k_mstp_base_pdm = 0x40256000UL , k_mstp_base_adc = 0x40338000UL , k_mstp_base_sdhi = 0x40252000UL , k_mstp_base_xspi = 0x40268000UL , k_mstp_base_drw = 0x40444000UL } |
| Peripheral-family register-window bases (RA8D2 peripheral memory map). More... | |
| enum | mstp_family_span_t : uint64_t { k_mstp_chan_stride = 0x100UL , k_mstp_span_i3c = 0x214UL , k_mstp_span_canfd = 0x1920UL , k_mstp_span_cac = 0x10UL , k_mstp_span_crc = 0x20UL , k_mstp_span_doc = 0x20UL , k_mstp_span_pdm = 0x400UL , k_mstp_span_adc = 0x2224UL , k_mstp_span_sdhi = 0x200UL , k_mstp_span_xspi = 0x200UL , k_mstp_span_drw = 0x104UL } |
| Per-family instance stride / single-instance window span (bytes). More... | |
| enum | mstp_family_count_t : uint32_t { k_mstp_count_1 = 1U , k_mstp_count_2 = 2U , k_mstp_count_3 = 3U , k_mstp_count_4 = 4U , k_mstp_count_10 = 10U , k_mstp_count_14 = 14U } |
| Instance counts per family (channels with a module-stop bit). More... | |
Functions | |
| static const mstp_family_t * | internal_mstp_family_for_addr (uint64_t addr, uint32_t *out_idx) |
Resolve addr to the family + instance index that owns it. | |
| static bool | internal_mstp_bit_set (uint16_t id) |
True iff the module-stop bit id (packed ra8_mstp_t) reads set. | |
| void | priv_board_mstp_reset (void) |
Restore MSTPCRA..MSTPCRE to their all-stopped reset values. | |
| void | priv_board_mstp_apply_write (uint64_t off, unsigned size, uint32_t value) |
Apply a firmware write to the MSTPCRA..MSTPCRE shadow. | |
| uint32_t | priv_board_mstp_read_reg (uint64_t off, unsigned size) |
Read the tracked MSTPCRA..MSTPCRE shadow (the read-back path). | |
| bool | priv_board_mstp_addr_stopped (uint64_t addr) |
Report whether the peripheral instance owning addr is module-stopped. | |
| void | priv_board_mstp_note_gated_access (uint64_t addr, bool is_write) |
| Record that an MMIO access to a module-stopped peripheral was dropped. | |
| uint32_t | priv_board_mstp_gated_read_count (void) |
| Number of reads zeroed because their peripheral was module-stopped. | |
| uint32_t | priv_board_mstp_gated_write_count (void) |
| Number of writes dropped because their peripheral was module-stopped. | |
| const char * | priv_board_mstp_last_gated_name (void) |
| Label of the peripheral whose access was most recently gated off. | |
Variables | |
| static uint32_t | s_mstpcr [k_mstp_reg_count] |
| MSTPCRA..E live values. | |
| static uint32_t | s_gated_reads |
| Reads zeroed (peripheral off). | |
| static uint32_t | s_gated_writes |
| Writes dropped (periph off). | |
| static const char * | s_last_gated = "-" |
| Label of last gated access. | |
| static const uint16_t | s_k_ids_sci [] |
| SCI0..SCI9 (0x40358000, 0x100 stride) – MSTPCRB31..22, HUM 11.2.7. | |
| static const uint16_t | s_k_ids_spi [] |
| SPI0..SPI1 (0x4035C000, 0x100 stride) – MSTPCRB19..18, HUM 11.2.7. | |
| static const uint16_t | s_k_ids_riic [] |
| IIC0..IIC2 / RIIC (0x4025E000, 0x100 stride) – MSTPCRB9..7, HUM 11.2.7. | |
| static const uint16_t | s_k_ids_i3c [] = {(uint16_t)k_ra8_mstp_i3c} |
| I3C0 (0x4035F000) – MSTPCRB4, HUM 11.2.7. | |
| static const uint16_t | s_k_ids_agt [] |
| AGT0..AGT1 (0x40221000, 0x100 stride) – MSTPCRD5..4, HUM 11.2.9. | |
| static const uint16_t | s_k_ids_gpt [] |
| GPT0..GPT13 (0x40322000, 0x100 stride) – MSTPCRE31..18, GPT4..9 share MSTPE27, HUM 11.2.10. | |
| static const uint16_t | s_k_ids_ulpt [] |
| ULPT0..ULPT1 (0x40220000, 0x100 stride) – MSTPCRE9..8, HUM 11.2.10. | |
| static const uint16_t | s_k_ids_dac [] |
| DAC_B0..DAC_B1 (0x40233000, 0x100 stride) – MSTPCRD20..19, HUM 11.2.9. | |
| static const uint16_t | s_k_ids_ssie [] |
| SSIE0..SSIE1 (0x4025D000, 0x100 stride) – MSTPCRC8..7, HUM 11.2.8. | |
| static const uint16_t | s_k_ids_poeg [] |
| POEG group A..D (0x40212000, 0x100 stride) – MSTPCRD14..11, HUM 11.2.9. | |
| static const uint16_t | s_k_ids_canfd0 [] = {(uint16_t)k_ra8_mstp_canfd0} |
| CANFD0 (0x40380000) – MSTPCRC27, HUM 11.2.8. | |
| static const uint16_t | s_k_ids_canfd1 [] = {(uint16_t)k_ra8_mstp_canfd1} |
| CANFD1 (0x40382000) – MSTPCRC26, HUM 11.2.8. | |
| static const uint16_t | s_k_ids_cac [] = {(uint16_t)k_ra8_mstp_cac} |
| CAC (0x40202400) – MSTPCRC0, HUM 11.2.8. | |
| static const uint16_t | s_k_ids_crc [] = {(uint16_t)k_ra8_mstp_crc} |
| CRC (0x40310000) – MSTPCRC1, HUM 11.2.8. | |
| static const uint16_t | s_k_ids_doc [] = {(uint16_t)k_ra8_mstp_doc} |
| DOC (0x40311000) – MSTPCRC13, HUM 11.2.8. | |
| static const uint16_t | s_k_ids_ceu [] = {(uint16_t)k_ra8_mstp_ceu} |
| CEU (0x40348000) – MSTPCRC16, HUM 11.2.8. | |
| static const uint16_t | s_k_ids_pdm [] = {(uint16_t)k_ra8_mstp_pdmif} |
| PDM-IF (0x40256000) – MSTPCRC24, HUM 11.2.8. | |
| static const uint16_t | s_k_ids_adc [] = {(uint16_t)k_ra8_mstp_adc16h} |
| ADC_B (0x40338000) – MSTPCRD21, HUM 11.2.9. | |
| static const uint16_t | s_k_ids_sdhi [] = {(uint16_t)k_ra8_mstp_sdhi0} |
| SDHI0 (0x40252000) – MSTPCRC12, HUM 11.2.8. | |
| static const uint16_t | s_k_ids_xspi [] = {(uint16_t)k_ra8_mstp_ospi0} |
| XSPI0 / OSPI0 (0x40268000) – MSTPCRB16, HUM 11.2.7. | |
| static const uint16_t | s_k_ids_drw [] = {(uint16_t)k_ra8_mstp_drw} |
| DRW / D-AVE 2D (0x40444000) – MSTPCRC6, HUM 11.2.8. | |
| static const mstp_family_t | s_k_families [] |
| The gate table: every module-stop-gated modelled peripheral instance. | |
Module-stop (MSTP) shadow + address->bit gate table (engine-free half).
Owns the five MSTPCRA..MSTPCRE words the RA8D2 uses to clock-gate every peripheral (R_MSTP at 0x4020_3000 – HUM Ch 11.2.6..11.2.10 p 443-450) and the table that maps a peripheral register address to the module-stop bit that governs it. priv_board_mstp_addr_stopped answers the one question the ra8_emulator core asks per MMIO access: "is the peripheral that owns this address currently
unclocked?" – and if so the core reads 0 / drops the write, matching silicon.
This translation unit deliberately takes NO Unicorn dependency: it is pure state + arithmetic, so the gate table is unit-tested directly on the host (tests/misc/src/test_ra8_emulator_mstp_gate.c) rather than only through a full emulation run. The board_periph block glue that needs the engine (register window ownership, reset hook, end-of-run report) is the separate board_periph_mstp.c.
An entry exists for each modelled peripheral instance that (a) has a module-stop bit and (b) is answered by an OWNING board_periph block, so that gating it has an observable effect. Peripherals with no module-stop control (GPIO/PORT, ICU, SYSC), memory controllers (SRAM/MRAM), always-on blocks (WDT), the observe-only snoops (GLCDC, PRCR) and the delicate shared/loop families (DMAC+DTC on MSTPA22/23, the R-Switch Ethernet cluster, the USB self-loop model) are intentionally NOT gated here and answer as before; each is a documented deferral rather than an implicit gap. The bit for every entry is taken from ra8_mstp_regs.h (k_ra8_mstp_*), whose per-bit HUM citations are the source of truth.
Definition in file board_periph_mstp_model.c.
| enum mstp_dim_t : uint32_t |
Shadow-array dimensions + bit-field packing constants.
| Enumerator | |
|---|---|
| k_mstp_reg_count | MSTPCRA..MSTPCRE. |
| k_mstp_bytes_per_reg | 32-bit registers. |
| k_mstp_byte_bits | Bits per byte. |
| k_mstp_byte_mask | Low-byte mask. |
| k_mstp_id_reg_shift | ra8_mstp_t: reg in bits 15:8. |
| k_mstp_id_bit_mask | ra8_mstp_t: bit in bits 7:0. |
Definition at line 45 of file board_periph_mstp_model.c.
| enum mstp_family_base_t : uint64_t |
Peripheral-family register-window bases (RA8D2 peripheral memory map).
Definition at line 198 of file board_periph_mstp_model.c.
| enum mstp_family_count_t : uint32_t |
Instance counts per family (channels with a module-stop bit).
Definition at line 238 of file board_periph_mstp_model.c.
| enum mstp_family_span_t : uint64_t |
Per-family instance stride / single-instance window span (bytes).
Definition at line 223 of file board_periph_mstp_model.c.
| enum mstp_reset_t : uint32_t |
Per-register reset values: all peripheral bits stopped (HUM 11.2.6).
MSTPCRA keeps the SRAM0..3 bits (0..3) running (0) because the CPU stack lives there; every other bit resets to 1 (stopped). MSTPCRB..E reset fully stopped. This is the same all-stopped baseline ra8_mstp_init writes, so a peripheral reads 0 until its driver clears its bit.
| Enumerator | |
|---|---|
| k_mstp_reset_a | MSTPCRA: SRAM0-3 (bits 0-3) running. |
| k_mstp_reset_rest | MSTPCRB..E: all peripherals stopped. |
Definition at line 63 of file board_periph_mstp_model.c.
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True iff the module-stop bit id (packed ra8_mstp_t) reads set.
True iff the module-stop bit id (packed ra8_mstp_t) reads set; this step is contained within the board periph module-stop model model and uses bounded caller or module-owned storage.
| [in] | id | Id input used by the operation. |
| true | The module-stop bit set condition holds or completed successfully; false otherwise. |
Definition at line 395 of file board_periph_mstp_model.c.
References k_mstp_byte_mask, k_mstp_id_bit_mask, k_mstp_id_reg_shift, k_mstp_reg_count, and s_mstpcr.
Referenced by priv_board_mstp_addr_stopped().
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Resolve addr to the family + instance index that owns it.
| [in] | addr | Absolute peripheral address. |
| [out] | out_idx | Instance index within the family on a hit. |
addr is not gated. Definition at line 370 of file board_periph_mstp_model.c.
References mstp_family_t::base, mstp_family_t::count, s_k_families, and mstp_family_t::stride.
Referenced by priv_board_mstp_addr_stopped(), and priv_board_mstp_note_gated_access().
| bool priv_board_mstp_addr_stopped | ( | uint64_t | addr | ) |
Report whether the peripheral instance owning addr is module-stopped.
Maps addr through the address->module-stop-bit gate table (each entry cites the governing MSTPCRx bit from HUM Ch 11.2.6..11.2.10) and returns whether that bit is currently set. An address covered by no gate entry – a peripheral with no module-stop control (GPIO, ICU, SYSC), or one ra8_emulator does not gate – is never stopped, so unmodelled and un-gated blocks answer exactly as before.
| [in] | addr | Absolute peripheral register address being accessed. |
true when addr belongs to a gated instance whose module-stop bit is set (unclocked); false otherwise. | true | The owning instance is stopped: reads 0, writes dropped. |
| false | Not gated, or the owning instance is running. |
Definition at line 452 of file board_periph_mstp_model.c.
References mstp_family_t::ids, internal_mstp_bit_set(), internal_mstp_family_for_addr(), and RA8_PRIV.
Referenced by board_periph_read(), and board_periph_write().
| void priv_board_mstp_apply_write | ( | uint64_t | off, |
| unsigned | size, | ||
| uint32_t | value ) |
Apply a firmware write to the MSTPCRA..MSTPCRE shadow.
Merges value into the tracked register bytes at off (a 0-based offset into the 20-byte block), so any 8/16/32-bit access width lands correctly. Clearing a bit ungates that peripheral; setting it re-gates it. HUM Ch 11.2.6 p 443: "bit clear == ungate the peripheral". The model accepts every bit (PSAR Non-secure attribution is not re-modelled here) because firmware never relies on a Secure write to a delegated bit sticking.
| [in] | off | Byte offset within the R_MSTP window (0..19). |
| [in] | size | Access width in bytes (1/2/4). |
| [in] | value | Little-endian value being written. |
value inside the window replace the tracked bytes. Definition at line 421 of file board_periph_mstp_model.c.
References k_board_mstp_win_span, k_mstp_byte_bits, k_mstp_byte_mask, k_mstp_bytes_per_reg, RA8_PRIV, and s_mstpcr.
Referenced by internal_mstp_write().
| uint32_t priv_board_mstp_gated_read_count | ( | void | ) |
Number of reads zeroed because their peripheral was module-stopped.
Number of reads zeroed because their peripheral was module-stopped; this step is contained within the board periph module-stop model and uses bounded caller or module-owned storage.
| value | The operation-specific board module-stop gated read count value. |
Definition at line 476 of file board_periph_mstp_model.c.
References RA8_PRIV, and s_gated_reads.
Referenced by internal_mstp_report().
| uint32_t priv_board_mstp_gated_write_count | ( | void | ) |
Number of writes dropped because their peripheral was module-stopped.
Number of writes dropped because their peripheral was module-stopped; this step is contained within the board periph module-stop model and uses bounded caller or module-owned storage.
| value | The operation-specific board module-stop gated write count value. |
Definition at line 481 of file board_periph_mstp_model.c.
References RA8_PRIV, and s_gated_writes.
Referenced by internal_mstp_report().
| const char * priv_board_mstp_last_gated_name | ( | void | ) |
Label of the peripheral whose access was most recently gated off.
Definition at line 486 of file board_periph_mstp_model.c.
References RA8_PRIV, and s_last_gated.
Referenced by internal_mstp_report().
| void priv_board_mstp_note_gated_access | ( | uint64_t | addr, |
| bool | is_write ) |
Record that an MMIO access to a module-stopped peripheral was dropped.
Called by the core dispatch when priv_board_mstp_addr_stopped forced a read to 0 or a write to be discarded. Bumps the dropped-access counter and remembers the offending peripheral's label so the end-of-run report can make the masked bug LOUD instead of silent.
| [in] | addr | Absolute address that was gated off. |
| [in] | is_write | true for a dropped write, false for a zeroed read. |
Definition at line 462 of file board_periph_mstp_model.c.
References internal_mstp_family_for_addr(), mstp_family_t::name, RA8_PRIV, s_gated_reads, s_gated_writes, and s_last_gated.
Referenced by board_periph_read(), and board_periph_write().
| uint32_t priv_board_mstp_read_reg | ( | uint64_t | off, |
| unsigned | size ) |
Read the tracked MSTPCRA..MSTPCRE shadow (the read-back path).
Returns the bytes of the shadow at off, so the firmware's mandated module-stop read-back (HUM Ch 11.2.6 Note 2 p 443) sees the value it just wrote and settles immediately – deterministic, unlike the sparse fallback's spin-settle toggle.
| [in] | off | Byte offset within the R_MSTP window (0..19). |
| [in] | size | Access width in bytes (1/2/4). |
off, or 0 for bytes outside the window. off addresses the R_MSTP window. | value | The operation-specific board module-stop read reg value. |
Definition at line 436 of file board_periph_mstp_model.c.
References k_board_mstp_win_span, k_mstp_byte_bits, k_mstp_byte_mask, k_mstp_bytes_per_reg, RA8_PRIV, and s_mstpcr.
Referenced by internal_mstp_read().
| void priv_board_mstp_reset | ( | void | ) |
Restore MSTPCRA..MSTPCRE to their all-stopped reset values.
Every peripheral bit returns to 1 (module stopped), matching the silicon power-on state, so a gated block reads 0 until firmware ungates it. The MSTPCRA SRAM bits (0..3) are left running (0), mirroring the safe pattern ra8_mstp_init writes (HUM Ch 11.2.6 p 443).
Definition at line 410 of file board_periph_mstp_model.c.
References k_mstp_reg_count, k_mstp_reset_a, k_mstp_reset_rest, RA8_PRIV, s_gated_reads, s_gated_writes, s_last_gated, and s_mstpcr.
Referenced by internal_mstp_block_register().
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Reads zeroed (peripheral off).
Definition at line 74 of file board_periph_mstp_model.c.
Referenced by priv_board_mstp_gated_read_count(), priv_board_mstp_note_gated_access(), and priv_board_mstp_reset().
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Writes dropped (periph off).
Definition at line 75 of file board_periph_mstp_model.c.
Referenced by priv_board_mstp_gated_write_count(), priv_board_mstp_note_gated_access(), and priv_board_mstp_reset().
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The gate table: every module-stop-gated modelled peripheral instance.
Definition at line 248 of file board_periph_mstp_model.c.
Referenced by internal_mstp_family_for_addr().
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ADC_B (0x40338000) – MSTPCRD21, HUM 11.2.9.
Definition at line 174 of file board_periph_mstp_model.c.
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AGT0..AGT1 (0x40221000, 0x100 stride) – MSTPCRD5..4, HUM 11.2.9.
Definition at line 115 of file board_periph_mstp_model.c.
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CAC (0x40202400) – MSTPCRC0, HUM 11.2.8.
Definition at line 164 of file board_periph_mstp_model.c.
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CANFD0 (0x40380000) – MSTPCRC27, HUM 11.2.8.
Definition at line 160 of file board_periph_mstp_model.c.
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CANFD1 (0x40382000) – MSTPCRC26, HUM 11.2.8.
Definition at line 162 of file board_periph_mstp_model.c.
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CEU (0x40348000) – MSTPCRC16, HUM 11.2.8.
Definition at line 170 of file board_periph_mstp_model.c.
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CRC (0x40310000) – MSTPCRC1, HUM 11.2.8.
Definition at line 166 of file board_periph_mstp_model.c.
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DAC_B0..DAC_B1 (0x40233000, 0x100 stride) – MSTPCRD20..19, HUM 11.2.9.
Definition at line 143 of file board_periph_mstp_model.c.
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DOC (0x40311000) – MSTPCRC13, HUM 11.2.8.
Definition at line 168 of file board_periph_mstp_model.c.
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DRW / D-AVE 2D (0x40444000) – MSTPCRC6, HUM 11.2.8.
Definition at line 180 of file board_periph_mstp_model.c.
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GPT0..GPT13 (0x40322000, 0x100 stride) – MSTPCRE31..18, GPT4..9 share MSTPE27, HUM 11.2.10.
Definition at line 121 of file board_periph_mstp_model.c.
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I3C0 (0x4035F000) – MSTPCRB4, HUM 11.2.7.
Definition at line 113 of file board_periph_mstp_model.c.
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PDM-IF (0x40256000) – MSTPCRC24, HUM 11.2.8.
Definition at line 172 of file board_periph_mstp_model.c.
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POEG group A..D (0x40212000, 0x100 stride) – MSTPCRD14..11, HUM 11.2.9.
Definition at line 153 of file board_periph_mstp_model.c.
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IIC0..IIC2 / RIIC (0x4025E000, 0x100 stride) – MSTPCRB9..7, HUM 11.2.7.
Definition at line 107 of file board_periph_mstp_model.c.
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SCI0..SCI9 (0x40358000, 0x100 stride) – MSTPCRB31..22, HUM 11.2.7.
Definition at line 89 of file board_periph_mstp_model.c.
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SDHI0 (0x40252000) – MSTPCRC12, HUM 11.2.8.
Definition at line 176 of file board_periph_mstp_model.c.
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SPI0..SPI1 (0x4035C000, 0x100 stride) – MSTPCRB19..18, HUM 11.2.7.
Definition at line 102 of file board_periph_mstp_model.c.
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SSIE0..SSIE1 (0x4025D000, 0x100 stride) – MSTPCRC8..7, HUM 11.2.8.
Definition at line 148 of file board_periph_mstp_model.c.
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ULPT0..ULPT1 (0x40220000, 0x100 stride) – MSTPCRE9..8, HUM 11.2.10.
Definition at line 138 of file board_periph_mstp_model.c.
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XSPI0 / OSPI0 (0x40268000) – MSTPCRB16, HUM 11.2.7.
Definition at line 178 of file board_periph_mstp_model.c.
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Label of last gated access.
Definition at line 76 of file board_periph_mstp_model.c.
Referenced by priv_board_mstp_last_gated_name(), priv_board_mstp_note_gated_access(), and priv_board_mstp_reset().
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MSTPCRA..E live values.
Definition at line 73 of file board_periph_mstp_model.c.
Referenced by internal_mstp_bit_set(), priv_board_mstp_apply_write(), priv_board_mstp_read_reg(), and priv_board_mstp_reset().