board_periph_mstp_model.c

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#include <stdint.h>
 
#include "board_periph_mstp_internal.h"
#include "ra8_attributes.h"
#include "ra8_mstp_regs.h"

typedef enum : uint32_t {
  k_mstp_reg_count     = 5U,    
  k_mstp_bytes_per_reg = 4U,    
  k_mstp_byte_bits     = 8U,    
  k_mstp_byte_mask     = 0xFFU, 
  k_mstp_id_reg_shift  = 8U,    
  k_mstp_id_bit_mask   = 0xFFU, 
} mstp_dim_t;

typedef enum : uint32_t {
  k_mstp_reset_a    = 0xFFFFFFF0U, 
  k_mstp_reset_rest = 0xFFFFFFFFU, 
} mstp_reset_t;
 
/* =============================================================================
 * Shadow state + observability.
 * =============================================================================
 */
 
static uint32_t    s_mstpcr[k_mstp_reg_count]; 
static uint32_t    s_gated_reads;              
static uint32_t    s_gated_writes;             
static const char* s_last_gated = "-";         
 
/* =============================================================================
 * Address -> module-stop-bit gate table.
 *
 * A family covers one strided run of instances, each mapping to the packed
 * ra8_mstp_t bit at the same index; a single-instance peripheral is a family of
 * count 1 whose stride equals its whole register window. The bit values come
 * from ra8_mstp_regs.h -- their HUM Ch/page citations live there.
 * =============================================================================
 */

static const uint16_t s_k_ids_sci[] = {
  (uint16_t)k_ra8_mstp_sci0,
  (uint16_t)k_ra8_mstp_sci1,
  (uint16_t)k_ra8_mstp_sci2,
  (uint16_t)k_ra8_mstp_sci3,
  (uint16_t)k_ra8_mstp_sci4,
  (uint16_t)k_ra8_mstp_sci5,
  (uint16_t)k_ra8_mstp_sci6,
  (uint16_t)k_ra8_mstp_sci7,
  (uint16_t)k_ra8_mstp_sci8,
  (uint16_t)k_ra8_mstp_sci9,
};

static const uint16_t s_k_ids_spi[] = {
  (uint16_t)k_ra8_mstp_spi0,
  (uint16_t)k_ra8_mstp_spi1,
};

static const uint16_t s_k_ids_riic[] = {
  (uint16_t)k_ra8_mstp_iic0,
  (uint16_t)k_ra8_mstp_iic1,
  (uint16_t)k_ra8_mstp_iic2,
};

static const uint16_t s_k_ids_i3c[] = {(uint16_t)k_ra8_mstp_i3c};
static const uint16_t s_k_ids_agt[] = {
  (uint16_t)k_ra8_mstp_agt0,
  (uint16_t)k_ra8_mstp_agt1,
};

static const uint16_t s_k_ids_gpt[] = {
  (uint16_t)k_ra8_mstp_gpt0,
  (uint16_t)k_ra8_mstp_gpt1,
  (uint16_t)k_ra8_mstp_gpt2,
  (uint16_t)k_ra8_mstp_gpt3,
  (uint16_t)k_ra8_mstp_gpt4_9,
  (uint16_t)k_ra8_mstp_gpt4_9,
  (uint16_t)k_ra8_mstp_gpt4_9,
  (uint16_t)k_ra8_mstp_gpt4_9,
  (uint16_t)k_ra8_mstp_gpt4_9,
  (uint16_t)k_ra8_mstp_gpt4_9,
  (uint16_t)k_ra8_mstp_gpt10,
  (uint16_t)k_ra8_mstp_gpt11,
  (uint16_t)k_ra8_mstp_gpt12,
  (uint16_t)k_ra8_mstp_gpt13,
};

static const uint16_t s_k_ids_ulpt[] = {
  (uint16_t)k_ra8_mstp_ulpt0,
  (uint16_t)k_ra8_mstp_ulpt1,
};

static const uint16_t s_k_ids_dac[] = {
  (uint16_t)k_ra8_mstp_dac12_0,
  (uint16_t)k_ra8_mstp_dac12_1,
};

static const uint16_t s_k_ids_ssie[] = {
  (uint16_t)k_ra8_mstp_ssie0,
  (uint16_t)k_ra8_mstp_ssie1,
};

static const uint16_t s_k_ids_poeg[] = {
  (uint16_t)k_ra8_mstp_poeg_a,
  (uint16_t)k_ra8_mstp_poeg_b,
  (uint16_t)k_ra8_mstp_poeg_c,
  (uint16_t)k_ra8_mstp_poeg_d,
};

static const uint16_t s_k_ids_canfd0[] = {(uint16_t)k_ra8_mstp_canfd0};
static const uint16_t s_k_ids_canfd1[] = {(uint16_t)k_ra8_mstp_canfd1};
static const uint16_t s_k_ids_cac[] = {(uint16_t)k_ra8_mstp_cac};
static const uint16_t s_k_ids_crc[] = {(uint16_t)k_ra8_mstp_crc};
static const uint16_t s_k_ids_doc[] = {(uint16_t)k_ra8_mstp_doc};
static const uint16_t s_k_ids_ceu[] = {(uint16_t)k_ra8_mstp_ceu};
static const uint16_t s_k_ids_pdm[] = {(uint16_t)k_ra8_mstp_pdmif};
static const uint16_t s_k_ids_adc[] = {(uint16_t)k_ra8_mstp_adc16h};
static const uint16_t s_k_ids_sdhi[] = {(uint16_t)k_ra8_mstp_sdhi0};
static const uint16_t s_k_ids_xspi[] = {(uint16_t)k_ra8_mstp_ospi0};
static const uint16_t s_k_ids_drw[] = {(uint16_t)k_ra8_mstp_drw};

typedef struct {
  uint64_t        base;   
  uint64_t        stride; 
  uint32_t        count;  
  const uint16_t* ids;    
  const char*     name;   
} mstp_family_t;

typedef enum : uint64_t {
  k_mstp_base_sci    = 0x40358000UL, 
  k_mstp_base_spi    = 0x4035C000UL, 
  k_mstp_base_riic   = 0x4025E000UL, 
  k_mstp_base_i3c    = 0x4035F000UL, 
  k_mstp_base_agt    = 0x40221000UL, 
  k_mstp_base_gpt    = 0x40322000UL, 
  k_mstp_base_ulpt   = 0x40220000UL, 
  k_mstp_base_dac    = 0x40233000UL, 
  k_mstp_base_ssie   = 0x4025D000UL, 
  k_mstp_base_poeg   = 0x40212000UL, 
  k_mstp_base_canfd0 = 0x40380000UL, 
  k_mstp_base_canfd1 = 0x40382000UL, 
  k_mstp_base_cac    = 0x40202400UL, 
  k_mstp_base_crc    = 0x40310000UL, 
  k_mstp_base_doc    = 0x40311000UL, 
  k_mstp_base_ceu    = 0x40348000UL, 
  k_mstp_base_pdm    = 0x40256000UL, 
  k_mstp_base_adc    = 0x40338000UL, 
  k_mstp_base_sdhi   = 0x40252000UL, 
  k_mstp_base_xspi   = 0x40268000UL, 
  k_mstp_base_drw    = 0x40444000UL, 
} mstp_family_base_t;

typedef enum : uint64_t {
  k_mstp_chan_stride = 0x100UL,  
  k_mstp_span_i3c    = 0x214UL,  
  k_mstp_span_canfd  = 0x1920UL, 
  k_mstp_span_cac    = 0x10UL,   
  k_mstp_span_crc    = 0x20UL,   
  k_mstp_span_doc    = 0x20UL,   
  k_mstp_span_pdm    = 0x400UL,  
  k_mstp_span_adc    = 0x2224UL, 
  k_mstp_span_sdhi   = 0x200UL,  
  k_mstp_span_xspi   = 0x200UL,  
  k_mstp_span_drw    = 0x104UL,  
} mstp_family_span_t;

typedef enum : uint32_t {
  k_mstp_count_1  = 1U,  
  k_mstp_count_2  = 2U,  
  k_mstp_count_3  = 3U,  
  k_mstp_count_4  = 4U,  
  k_mstp_count_10 = 10U, 
  k_mstp_count_14 = 14U, 
} mstp_family_count_t;

static const mstp_family_t s_k_families[] = {
  {(uint64_t)k_mstp_base_sci,
   (uint64_t)k_mstp_chan_stride,
   (uint32_t)k_mstp_count_10,
   s_k_ids_sci,
   "SCI"},
  {(uint64_t)k_mstp_base_spi,
   (uint64_t)k_mstp_chan_stride,
   (uint32_t)k_mstp_count_2,
   s_k_ids_spi,
   "SPI_B"},
  {(uint64_t)k_mstp_base_riic,
   (uint64_t)k_mstp_chan_stride,
   (uint32_t)k_mstp_count_3,
   s_k_ids_riic,
   "RIIC"},
  {(uint64_t)k_mstp_base_i3c,
   (uint64_t)k_mstp_span_i3c,
   (uint32_t)k_mstp_count_1,
   s_k_ids_i3c,
   "I3C"},
  {(uint64_t)k_mstp_base_agt,
   (uint64_t)k_mstp_chan_stride,
   (uint32_t)k_mstp_count_2,
   s_k_ids_agt,
   "AGT"},
  {(uint64_t)k_mstp_base_gpt,
   (uint64_t)k_mstp_chan_stride,
   (uint32_t)k_mstp_count_14,
   s_k_ids_gpt,
   "GPT"},
  {(uint64_t)k_mstp_base_ulpt,
   (uint64_t)k_mstp_chan_stride,
   (uint32_t)k_mstp_count_2,
   s_k_ids_ulpt,
   "ULPT"},
  {(uint64_t)k_mstp_base_dac,
   (uint64_t)k_mstp_chan_stride,
   (uint32_t)k_mstp_count_2,
   s_k_ids_dac,
   "DAC_B"},
  {(uint64_t)k_mstp_base_ssie,
   (uint64_t)k_mstp_chan_stride,
   (uint32_t)k_mstp_count_2,
   s_k_ids_ssie,
   "SSIE"},
  {(uint64_t)k_mstp_base_poeg,
   (uint64_t)k_mstp_chan_stride,
   (uint32_t)k_mstp_count_4,
   s_k_ids_poeg,
   "POEG"},
  {(uint64_t)k_mstp_base_canfd0,
   (uint64_t)k_mstp_span_canfd,
   (uint32_t)k_mstp_count_1,
   s_k_ids_canfd0,
   "CANFD0"},
  {(uint64_t)k_mstp_base_canfd1,
   (uint64_t)k_mstp_span_canfd,
   (uint32_t)k_mstp_count_1,
   s_k_ids_canfd1,
   "CANFD1"},
  {(uint64_t)k_mstp_base_cac,
   (uint64_t)k_mstp_span_cac,
   (uint32_t)k_mstp_count_1,
   s_k_ids_cac,
   "CAC"},
  {(uint64_t)k_mstp_base_crc,
   (uint64_t)k_mstp_span_crc,
   (uint32_t)k_mstp_count_1,
   s_k_ids_crc,
   "CRC"},
  {(uint64_t)k_mstp_base_doc,
   (uint64_t)k_mstp_span_doc,
   (uint32_t)k_mstp_count_1,
   s_k_ids_doc,
   "DOC"},
  {(uint64_t)k_mstp_base_ceu,
   (uint64_t)k_mstp_chan_stride,
   (uint32_t)k_mstp_count_1,
   s_k_ids_ceu,
   "CEU"},
  {(uint64_t)k_mstp_base_pdm,
   (uint64_t)k_mstp_span_pdm,
   (uint32_t)k_mstp_count_1,
   s_k_ids_pdm,
   "PDM-IF"},
  {(uint64_t)k_mstp_base_adc,
   (uint64_t)k_mstp_span_adc,
   (uint32_t)k_mstp_count_1,
   s_k_ids_adc,
   "ADC_B"},
  {(uint64_t)k_mstp_base_sdhi,
   (uint64_t)k_mstp_span_sdhi,
   (uint32_t)k_mstp_count_1,
   s_k_ids_sdhi,
   "SDHI0"},
  {(uint64_t)k_mstp_base_xspi,
   (uint64_t)k_mstp_span_xspi,
   (uint32_t)k_mstp_count_1,
   s_k_ids_xspi,
   "XSPI0"},
  {(uint64_t)k_mstp_base_drw,
   (uint64_t)k_mstp_span_drw,
   (uint32_t)k_mstp_count_1,
   s_k_ids_drw,
   "DRW"},
};
 
/* =============================================================================
 * Internal helpers.
 * =============================================================================
 */

RA8_INTERNAL
static const mstp_family_t* internal_mstp_family_for_addr(uint64_t addr, uint32_t* out_idx)
{
  for (uint32_t f = 0U; f < (sizeof(s_k_families) / sizeof(s_k_families[0])); f++) {
    const mstp_family_t* fam  = &s_k_families[f];
    const uint64_t       span = fam->stride * (uint64_t)fam->count;
    if ((addr >= fam->base) && (addr < (fam->base + span))) {
      *out_idx = (uint32_t)((addr - fam->base) / fam->stride);
      return fam;
    }
  }
  return nullptr;
}

RA8_INTERNAL
static bool internal_mstp_bit_set(uint16_t id)
{
  const uint32_t reg = ((uint32_t)id >> (uint32_t)k_mstp_id_reg_shift) & (uint32_t)k_mstp_byte_mask;
  const uint32_t bit = (uint32_t)id & (uint32_t)k_mstp_id_bit_mask;
  if (reg >= (uint32_t)k_mstp_reg_count) {
    return false; /* defensive: a malformed id gates nothing. */
  }
  return (s_mstpcr[reg] & ((uint32_t)1U << bit)) != 0U;
}
 
/* =============================================================================
 * Public (module-private) API.
 * =============================================================================
 */
 
RA8_PRIV void priv_board_mstp_reset(void)
{
  s_mstpcr[0] = (uint32_t)k_mstp_reset_a;
  for (uint32_t r = 1U; r < (uint32_t)k_mstp_reg_count; r++) {
    s_mstpcr[r] = (uint32_t)k_mstp_reset_rest;
  }
  s_gated_reads  = 0U;
  s_gated_writes = 0U;
  s_last_gated   = "-";
}
 
RA8_PRIV void priv_board_mstp_apply_write(uint64_t off, unsigned size, uint32_t value)
{
  for (unsigned i = 0U; i < size; i++) {
    const uint64_t b = off + (uint64_t)i;
    if (b >= (uint64_t)k_board_mstp_win_span) {
      break;
    }
    const uint32_t reg = (uint32_t)(b / (uint64_t)k_mstp_bytes_per_reg);
    const uint32_t sh = (uint32_t)(b % (uint64_t)k_mstp_bytes_per_reg) * (uint32_t)k_mstp_byte_bits;
    const uint32_t vb =
      (value >> ((uint32_t)i * (uint32_t)k_mstp_byte_bits)) & (uint32_t)k_mstp_byte_mask;
    s_mstpcr[reg] = (s_mstpcr[reg] & ~((uint32_t)k_mstp_byte_mask << sh)) | (vb << sh);
  }
}
 
RA8_PRIV uint32_t priv_board_mstp_read_reg(uint64_t off, unsigned size)
{
  uint32_t v = 0U;
  for (unsigned i = 0U; i < size; i++) {
    const uint64_t b = off + (uint64_t)i;
    if (b >= (uint64_t)k_board_mstp_win_span) {
      continue;
    }
    const uint32_t reg = (uint32_t)(b / (uint64_t)k_mstp_bytes_per_reg);
    const uint32_t sh = (uint32_t)(b % (uint64_t)k_mstp_bytes_per_reg) * (uint32_t)k_mstp_byte_bits;
    const uint32_t vb = (s_mstpcr[reg] >> sh) & (uint32_t)k_mstp_byte_mask;
    v |= vb << ((uint32_t)i * (uint32_t)k_mstp_byte_bits);
  }
  return v;
}
 
RA8_PRIV bool priv_board_mstp_addr_stopped(uint64_t addr)
{
  uint32_t             idx = 0U;
  const mstp_family_t* fam = internal_mstp_family_for_addr(addr, &idx);
  if (fam == nullptr) {
    return false; /* not gated: unmodelled or a peripheral with no module-stop. */
  }
  return internal_mstp_bit_set(fam->ids[idx]);
}
 
RA8_PRIV void priv_board_mstp_note_gated_access(uint64_t addr, bool is_write)
{
  uint32_t             idx = 0U;
  const mstp_family_t* fam = internal_mstp_family_for_addr(addr, &idx);
  if (fam != nullptr) {
    s_last_gated = fam->name;
  }
  if (is_write) {
    s_gated_writes++;
  } else {
    s_gated_reads++;
  }
}
 
RA8_PRIV uint32_t priv_board_mstp_gated_read_count(void)
{
  return s_gated_reads;
}
 
RA8_PRIV uint32_t priv_board_mstp_gated_write_count(void)
{
  return s_gated_writes;
}
 
RA8_PRIV const char* priv_board_mstp_last_gated_name(void)
{
  return s_last_gated;
}