ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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r_mstp_regs_t Struct Reference

Memory layout of the Module Stop Control Register block. More...

#include <ra8_mstp_regs.h>

Data Fields

volatile uint32_t MSTPCRA
 Module Stop Control Register A (+0x00).
volatile uint32_t MSTPCRB
 Module Stop Control Register B (+0x04).
volatile uint32_t MSTPCRC
 Module Stop Control Register C (+0x08).
volatile uint32_t MSTPCRD
 Module Stop Control Register D (+0x0C).
volatile uint32_t MSTPCRE
 Module Stop Control Register E (+0x10).

Detailed Description

Memory layout of the Module Stop Control Register block.

32-bit registers at offset 0x00 / 0x04 / 0x08 / 0x0C / 0x10.

Definition at line 87 of file ra8_mstp_regs.h.

Field Documentation

◆ MSTPCRA

volatile uint32_t r_mstp_regs_t::MSTPCRA

Module Stop Control Register A (+0x00).

Definition at line 88 of file ra8_mstp_regs.h.

Referenced by internal_reg_ptr().

◆ MSTPCRB

volatile uint32_t r_mstp_regs_t::MSTPCRB

Module Stop Control Register B (+0x04).

Definition at line 89 of file ra8_mstp_regs.h.

Referenced by ra8_cgc_usbfs_clock_enable(), and ra8_cgc_usbhs_pll_enable().

◆ MSTPCRC

volatile uint32_t r_mstp_regs_t::MSTPCRC

Module Stop Control Register C (+0x08).

Definition at line 90 of file ra8_mstp_regs.h.

Referenced by internal_mipi_phy_mstp_unstop().

◆ MSTPCRD

volatile uint32_t r_mstp_regs_t::MSTPCRD

Module Stop Control Register D (+0x0C).

Definition at line 91 of file ra8_mstp_regs.h.

◆ MSTPCRE

volatile uint32_t r_mstp_regs_t::MSTPCRE

Module Stop Control Register E (+0x10).

Definition at line 92 of file ra8_mstp_regs.h.


The documentation for this struct was generated from the following file: