ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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r_gpt_channel_regs_t Struct Reference

Per-channel GPT register window. More...

#include <ra8_gpt_regs.h>

Data Fields

volatile uint32_t GTWP
 +0x00 Write-Protection.
volatile uint32_t GTSTR
 +0x04 Software Start.
volatile uint32_t GTSTP
 +0x08 Software Stop.
volatile uint32_t GTCLR
 +0x0C Software Clear.
volatile uint32_t GTSSR
 +0x10 Start source select.
volatile uint32_t GTPSR
 +0x14 Stop source select.
volatile uint32_t GTCSR
 +0x18 Clear source select.
volatile uint32_t GTUPSR
 +0x1C Up-count source select.
volatile uint32_t GTDNSR
 +0x20 Down-count source select.
volatile uint32_t GTICASR
 +0x24 Input capture A source select.
volatile uint32_t GTICBSR
 +0x28 Input capture B source select.
volatile uint32_t GTCR
 +0x2C Timer Control.
volatile uint32_t GTUDDTYC
 +0x30 Count direction / duty.
volatile uint32_t GTIOR
 +0x34 I/O Control.
volatile uint32_t GTINTAD
 +0x38 Interrupt / ADC trigger.
volatile uint32_t GTST
 +0x3C Status.
volatile uint32_t GTBER
 +0x40 Buffer Enable.
volatile uint32_t GTITC
 +0x44 Interrupt + ADC start skipping.
volatile uint32_t GTCNT
 +0x48 Counter.
volatile uint32_t GTCCR [6]
 +0x4C..+0x60 Compare/Capture A..F.
volatile uint32_t GTPR
 +0x64 Period.
volatile uint32_t GTPBR
 +0x68 Period buffer.
volatile uint32_t GTPDBR
 +0x6C Period double-buffer.
volatile uint32_t GTADTRA
 +0x70 ADC start request timing A.
volatile uint32_t GTADTBRA
 +0x74 ADC start request timing buf A.
volatile uint32_t GTADTDBRA
 +0x78 ADC start request timing dbl A.
volatile uint32_t GTADTRB
 +0x7C ADC start request timing B.
volatile uint32_t GTADTBRB
 +0x80 ADC start request timing buf B.
volatile uint32_t GTADTDBRB
 +0x84 ADC start request timing dbl B.
volatile uint32_t GTDTCR
 +0x88 Dead Time Control.
volatile uint32_t GTDVU
 +0x8C Dead Time Value U.
volatile uint32_t GTDVD
 +0x90 Dead Time Value D.
volatile uint32_t GTDBU
 +0x94 Dead Time Buffer U.
volatile uint32_t GTDBD
 +0x98 Dead Time Buffer D.
volatile uint32_t GTSOS
 +0x9C Output Protection Status (RO).
volatile uint32_t GTSOTR
 +0xA0 Output Protection Trigger.
volatile uint32_t GTADSMR
 +0xA4 ADC start request skip mode.
volatile uint32_t GTEITC
 +0xA8 Extended interrupt skipping.
volatile uint32_t GTEITLI1
 +0xAC Extended interrupt skip link 1.
volatile uint32_t GTEITLI2
 +0xB0 Extended interrupt skip link 2.
volatile uint32_t GTEITLB
 +0xB4 Extended buffer-xfer skip.
volatile uint32_t GTICLF
 +0xB8 Inter-channel logical op.
volatile uint32_t GTPC
 +0xBC Period count.
volatile uint32_t GTADCMSC
 +0xC0 ADC start request control.
volatile uint32_t GTADCMSS
 +0xC4 ADC start request status.
volatile uint32_t _reserved0 [2]
 +0xC8..+0xCC reserved.
volatile uint32_t GTSECSR
 +0xD0 Op-enable simultaneous control.
volatile uint32_t GTSECR
 +0xD4 Op-enable simultaneous reg.
volatile uint32_t _reserved1 [2]
 +0xD8..+0xDC reserved.
volatile uint32_t GTBER2
 +0xE0 Buffer Enable 2.
volatile uint32_t GTOLBR
 +0xE4 Output Level Buffer.
volatile uint32_t _reserved2
 +0xE8 reserved.
volatile uint32_t GTICCR
 +0xEC Inter-channel cooperation in.

Detailed Description

Per-channel GPT register window.

Mirrors the FSP CMSIS R_GPT0_Type layout for the RA8D2 (sized 0xF0 in CMSIS). Only the registers we touch are unioned here; fields that are not currently read or written by the driver are still emitted at the right offset so future drivers can extend the struct without re-deriving the map.

HUM Ch 22 "General PWM Timer (GPT)", reg map summary, p 879.

Definition at line 55 of file ra8_gpt_regs.h.

Field Documentation

◆ _reserved0

volatile uint32_t r_gpt_channel_regs_t::_reserved0[2]

+0xC8..+0xCC reserved.

Definition at line 101 of file ra8_gpt_regs.h.

◆ _reserved1

volatile uint32_t r_gpt_channel_regs_t::_reserved1[2]

+0xD8..+0xDC reserved.

Definition at line 104 of file ra8_gpt_regs.h.

◆ _reserved2

volatile uint32_t r_gpt_channel_regs_t::_reserved2

+0xE8 reserved.

Definition at line 107 of file ra8_gpt_regs.h.

◆ GTADCMSC

volatile uint32_t r_gpt_channel_regs_t::GTADCMSC

+0xC0 ADC start request control.

Definition at line 99 of file ra8_gpt_regs.h.

◆ GTADCMSS

volatile uint32_t r_gpt_channel_regs_t::GTADCMSS

+0xC4 ADC start request status.

Definition at line 100 of file ra8_gpt_regs.h.

◆ GTADSMR

volatile uint32_t r_gpt_channel_regs_t::GTADSMR

+0xA4 ADC start request skip mode.

Definition at line 92 of file ra8_gpt_regs.h.

◆ GTADTBRA

volatile uint32_t r_gpt_channel_regs_t::GTADTBRA

+0x74 ADC start request timing buf A.

Definition at line 80 of file ra8_gpt_regs.h.

◆ GTADTBRB

volatile uint32_t r_gpt_channel_regs_t::GTADTBRB

+0x80 ADC start request timing buf B.

Definition at line 83 of file ra8_gpt_regs.h.

◆ GTADTDBRA

volatile uint32_t r_gpt_channel_regs_t::GTADTDBRA

+0x78 ADC start request timing dbl A.

Definition at line 81 of file ra8_gpt_regs.h.

◆ GTADTDBRB

volatile uint32_t r_gpt_channel_regs_t::GTADTDBRB

+0x84 ADC start request timing dbl B.

Definition at line 84 of file ra8_gpt_regs.h.

◆ GTADTRA

volatile uint32_t r_gpt_channel_regs_t::GTADTRA

+0x70 ADC start request timing A.

Definition at line 79 of file ra8_gpt_regs.h.

◆ GTADTRB

volatile uint32_t r_gpt_channel_regs_t::GTADTRB

+0x7C ADC start request timing B.

Definition at line 82 of file ra8_gpt_regs.h.

◆ GTBER

volatile uint32_t r_gpt_channel_regs_t::GTBER

+0x40 Buffer Enable.

Definition at line 72 of file ra8_gpt_regs.h.

Referenced by ra8_gpt_duty_cycle_set(), and ra8_gpt_three_phase_set_duty().

◆ GTBER2

volatile uint32_t r_gpt_channel_regs_t::GTBER2

+0xE0 Buffer Enable 2.

Definition at line 105 of file ra8_gpt_regs.h.

◆ GTCCR

volatile uint32_t r_gpt_channel_regs_t::GTCCR[6]

+0x4C..+0x60 Compare/Capture A..F.

Definition at line 75 of file ra8_gpt_regs.h.

Referenced by ra8_gpt_capture_read(), ra8_gpt_duty_cycle_set(), ra8_gpt_init(), ra8_gpt_set_duty(), and ra8_gpt_three_phase_set_duty().

◆ GTCLR

volatile uint32_t r_gpt_channel_regs_t::GTCLR

+0x0C Software Clear.

Definition at line 59 of file ra8_gpt_regs.h.

◆ GTCNT

volatile uint32_t r_gpt_channel_regs_t::GTCNT

+0x48 Counter.

Definition at line 74 of file ra8_gpt_regs.h.

Referenced by ra8_gpt_counter_set(), ra8_gpt_init(), ra8_gpt_period_set(), ra8_gpt_read(), ra8_gpt_read_dma(), and ra8_gpt_start_free_run().

◆ GTCR

volatile uint32_t r_gpt_channel_regs_t::GTCR

+0x2C Timer Control.

Definition at line 67 of file ra8_gpt_regs.h.

Referenced by ra8_gpt_counter_set(), ra8_gpt_deinit(), ra8_gpt_init(), ra8_gpt_period_set(), and ra8_gpt_start_free_run().

◆ GTCSR

volatile uint32_t r_gpt_channel_regs_t::GTCSR

+0x18 Clear source select.

Definition at line 62 of file ra8_gpt_regs.h.

◆ GTDBD

volatile uint32_t r_gpt_channel_regs_t::GTDBD

+0x98 Dead Time Buffer D.

Definition at line 89 of file ra8_gpt_regs.h.

◆ GTDBU

volatile uint32_t r_gpt_channel_regs_t::GTDBU

+0x94 Dead Time Buffer U.

Definition at line 88 of file ra8_gpt_regs.h.

◆ GTDNSR

volatile uint32_t r_gpt_channel_regs_t::GTDNSR

+0x20 Down-count source select.

Definition at line 64 of file ra8_gpt_regs.h.

Referenced by ra8_gpt_event_count_configure().

◆ GTDTCR

volatile uint32_t r_gpt_channel_regs_t::GTDTCR

+0x88 Dead Time Control.

Definition at line 85 of file ra8_gpt_regs.h.

Referenced by ra8_gpt_dead_time_set().

◆ GTDVD

volatile uint32_t r_gpt_channel_regs_t::GTDVD

+0x90 Dead Time Value D.

Definition at line 87 of file ra8_gpt_regs.h.

Referenced by ra8_gpt_dead_time_set().

◆ GTDVU

volatile uint32_t r_gpt_channel_regs_t::GTDVU

+0x8C Dead Time Value U.

Definition at line 86 of file ra8_gpt_regs.h.

Referenced by ra8_gpt_dead_time_set().

◆ GTEITC

volatile uint32_t r_gpt_channel_regs_t::GTEITC

+0xA8 Extended interrupt skipping.

Definition at line 93 of file ra8_gpt_regs.h.

◆ GTEITLB

volatile uint32_t r_gpt_channel_regs_t::GTEITLB

+0xB4 Extended buffer-xfer skip.

Definition at line 96 of file ra8_gpt_regs.h.

◆ GTEITLI1

volatile uint32_t r_gpt_channel_regs_t::GTEITLI1

+0xAC Extended interrupt skip link 1.

Definition at line 94 of file ra8_gpt_regs.h.

◆ GTEITLI2

volatile uint32_t r_gpt_channel_regs_t::GTEITLI2

+0xB0 Extended interrupt skip link 2.

Definition at line 95 of file ra8_gpt_regs.h.

◆ GTICASR

volatile uint32_t r_gpt_channel_regs_t::GTICASR

+0x24 Input capture A source select.

Definition at line 65 of file ra8_gpt_regs.h.

Referenced by ra8_gpt_capture_configure().

◆ GTICBSR

volatile uint32_t r_gpt_channel_regs_t::GTICBSR

+0x28 Input capture B source select.

Definition at line 66 of file ra8_gpt_regs.h.

Referenced by ra8_gpt_capture_configure().

◆ GTICCR

volatile uint32_t r_gpt_channel_regs_t::GTICCR

+0xEC Inter-channel cooperation in.

Definition at line 108 of file ra8_gpt_regs.h.

◆ GTICLF

volatile uint32_t r_gpt_channel_regs_t::GTICLF

+0xB8 Inter-channel logical op.

Definition at line 97 of file ra8_gpt_regs.h.

◆ GTINTAD

volatile uint32_t r_gpt_channel_regs_t::GTINTAD

+0x38 Interrupt / ADC trigger.

Definition at line 70 of file ra8_gpt_regs.h.

◆ GTIOR

volatile uint32_t r_gpt_channel_regs_t::GTIOR

+0x34 I/O Control.

Definition at line 69 of file ra8_gpt_regs.h.

Referenced by ra8_gpt_pwm_pin_configure().

◆ GTITC

volatile uint32_t r_gpt_channel_regs_t::GTITC

+0x44 Interrupt + ADC start skipping.

Definition at line 73 of file ra8_gpt_regs.h.

◆ GTOLBR

volatile uint32_t r_gpt_channel_regs_t::GTOLBR

+0xE4 Output Level Buffer.

Definition at line 106 of file ra8_gpt_regs.h.

◆ GTPBR

volatile uint32_t r_gpt_channel_regs_t::GTPBR

+0x68 Period buffer.

Definition at line 77 of file ra8_gpt_regs.h.

Referenced by ra8_gpt_init(), ra8_gpt_period_set(), and ra8_gpt_set_period().

◆ GTPC

volatile uint32_t r_gpt_channel_regs_t::GTPC

+0xBC Period count.

Definition at line 98 of file ra8_gpt_regs.h.

◆ GTPDBR

volatile uint32_t r_gpt_channel_regs_t::GTPDBR

+0x6C Period double-buffer.

Definition at line 78 of file ra8_gpt_regs.h.

◆ GTPR

volatile uint32_t r_gpt_channel_regs_t::GTPR

+0x64 Period.

Definition at line 76 of file ra8_gpt_regs.h.

Referenced by ra8_gpt_init(), ra8_gpt_period_set(), ra8_gpt_set_period(), ra8_gpt_start_free_run(), ra8_gpt_three_phase_set_duty(), and ra8_gpt_write_dma().

◆ GTPSR

volatile uint32_t r_gpt_channel_regs_t::GTPSR

+0x14 Stop source select.

Definition at line 61 of file ra8_gpt_regs.h.

◆ GTSECR

volatile uint32_t r_gpt_channel_regs_t::GTSECR

+0xD4 Op-enable simultaneous reg.

Definition at line 103 of file ra8_gpt_regs.h.

◆ GTSECSR

volatile uint32_t r_gpt_channel_regs_t::GTSECSR

+0xD0 Op-enable simultaneous control.

Definition at line 102 of file ra8_gpt_regs.h.

◆ GTSOS

volatile uint32_t r_gpt_channel_regs_t::GTSOS

+0x9C Output Protection Status (RO).

Definition at line 90 of file ra8_gpt_regs.h.

◆ GTSOTR

volatile uint32_t r_gpt_channel_regs_t::GTSOTR

+0xA0 Output Protection Trigger.

Definition at line 91 of file ra8_gpt_regs.h.

◆ GTSSR

volatile uint32_t r_gpt_channel_regs_t::GTSSR

+0x10 Start source select.

Definition at line 60 of file ra8_gpt_regs.h.

◆ GTST

volatile uint32_t r_gpt_channel_regs_t::GTST

+0x3C Status.

Definition at line 71 of file ra8_gpt_regs.h.

Referenced by internal_dispatch(), ra8_gpt_clear_status(), and ra8_gpt_get_status().

◆ GTSTP

volatile uint32_t r_gpt_channel_regs_t::GTSTP

+0x08 Software Stop.

Definition at line 58 of file ra8_gpt_regs.h.

Referenced by ra8_gpt_deinit(), ra8_gpt_enter_stop(), ra8_gpt_init(), ra8_gpt_start_free_run(), ra8_gpt_stop(), and ra8_gpt_three_phase_close().

◆ GTSTR

volatile uint32_t r_gpt_channel_regs_t::GTSTR

+0x04 Software Start.

Definition at line 57 of file ra8_gpt_regs.h.

Referenced by ra8_gpt_init(), ra8_gpt_start_free_run(), and ra8_gpt_three_phase_open().

◆ GTUDDTYC

volatile uint32_t r_gpt_channel_regs_t::GTUDDTYC

+0x30 Count direction / duty.

Definition at line 68 of file ra8_gpt_regs.h.

◆ GTUPSR

volatile uint32_t r_gpt_channel_regs_t::GTUPSR

+0x1C Up-count source select.

Definition at line 63 of file ra8_gpt_regs.h.

Referenced by ra8_gpt_event_count_configure().

◆ GTWP

volatile uint32_t r_gpt_channel_regs_t::GTWP

+0x00 Write-Protection.

Definition at line 56 of file ra8_gpt_regs.h.

Referenced by ra8_gpt_capture_configure(), ra8_gpt_counter_set(), ra8_gpt_dead_time_set(), ra8_gpt_deinit(), ra8_gpt_duty_cycle_set(), ra8_gpt_enter_stop(), ra8_gpt_event_count_configure(), ra8_gpt_init(), ra8_gpt_period_set(), ra8_gpt_pwm_pin_configure(), ra8_gpt_set_duty(), ra8_gpt_set_period(), ra8_gpt_start_free_run(), ra8_gpt_stop(), ra8_gpt_three_phase_close(), ra8_gpt_three_phase_open(), ra8_gpt_three_phase_set_duty(), ra8_pdg_bind_gpt_channel(), and ra8_pdg_unbind_gpt_channel().

The documentation for this struct was generated from the following file: