ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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r_crc_regs_t Struct Reference

CRC peripheral register block. More...

#include <ra8_crc_regs.h>

Data Fields

volatile uint8_t CRCCR0
 +0x00 Control Register 0 (GPS/LMS/DORCLR).
volatile uint8_t CRCCR1
 +0x01 Control Register 1 (CRCSWR/CRCSEN).
volatile uint16_t _r0
 +0x02 Reserved.
union { 
   volatile uint32_t   CRCDIR 
 +0x04 Input Data (32-bit, CRC-32/32C). More...
   volatile uint8_t   CRCDIR_BY 
 +0x04 Input Data (8-bit alias). More...
}; 
 (anon) register.
union { 
   volatile uint32_t   CRCDOR 
 +0x08 Output Data (32-bit, CRC-32/32C). More...
   volatile uint16_t   CRCDOR_HA 
 +0x08 Output Data (16-bit alias). More...
   volatile uint8_t   CRCDOR_BY 
 +0x08 Output Data (8-bit alias). More...
}; 
 (anon) register.
volatile uint16_t CRCSAR
 +0x0C Snoop Address Register (14-bit).
volatile uint16_t _r1
 +0x0E Reserved.

Detailed Description

CRC peripheral register block.

Re-derived against FSP R_CRC_Type in R7KA8D2KF_core0.h. Total size is exactly 16 bytes. CRCDIR/CRCDIR_BY and CRCDOR/CRCDOR_HA/ CRCDOR_BY share their physical address; the BY/HA alias members are placed in unions so byte/half-word/word writes hit the same register and the hardware uses CRCCR0.GPS to interpret width.

Definition at line 84 of file ra8_crc_regs.h.

Field Documentation

◆ [union]

union { ... } r_crc_regs_t

(anon) register.

◆ [union]

union { ... } r_crc_regs_t

(anon) register.

◆ _r0

volatile uint16_t r_crc_regs_t::_r0

+0x02 Reserved.

Definition at line 87 of file ra8_crc_regs.h.

◆ _r1

volatile uint16_t r_crc_regs_t::_r1

+0x0E Reserved.

Definition at line 98 of file ra8_crc_regs.h.

◆ CRCCR0

volatile uint8_t r_crc_regs_t::CRCCR0

+0x00 Control Register 0 (GPS/LMS/DORCLR).

Definition at line 85 of file ra8_crc_regs.h.

Referenced by ra8_crc_compute(), ra8_crc_deinit(), ra8_crc_enter_stop(), ra8_crc_get_status(), ra8_crc_init(), ra8_crc_reset(), and ra8_crc_set_poly().

◆ CRCCR1

volatile uint8_t r_crc_regs_t::CRCCR1

+0x01 Control Register 1 (CRCSWR/CRCSEN).

Definition at line 86 of file ra8_crc_regs.h.

Referenced by ra8_crc_deinit(), and ra8_crc_init().

◆ CRCDIR

volatile uint32_t r_crc_regs_t::CRCDIR

+0x04 Input Data (32-bit, CRC-32/32C).

Definition at line 89 of file ra8_crc_regs.h.

Referenced by internal_crc_feed_words().

◆ CRCDIR_BY

volatile uint8_t r_crc_regs_t::CRCDIR_BY

+0x04 Input Data (8-bit alias).

Definition at line 90 of file ra8_crc_regs.h.

Referenced by internal_crc_feed_bytes().

◆ CRCDOR

volatile uint32_t r_crc_regs_t::CRCDOR

+0x08 Output Data (32-bit, CRC-32/32C).

Definition at line 93 of file ra8_crc_regs.h.

Referenced by ra8_crc_compute().

◆ CRCDOR_BY

volatile uint8_t r_crc_regs_t::CRCDOR_BY

+0x08 Output Data (8-bit alias).

Definition at line 95 of file ra8_crc_regs.h.

◆ CRCDOR_HA

volatile uint16_t r_crc_regs_t::CRCDOR_HA

+0x08 Output Data (16-bit alias).

Definition at line 94 of file ra8_crc_regs.h.

◆ CRCSAR

volatile uint16_t r_crc_regs_t::CRCSAR

+0x0C Snoop Address Register (14-bit).

Definition at line 97 of file ra8_crc_regs.h.


The documentation for this struct was generated from the following file: