114#define H_TRANSPORT_NONE (0)
134#define H_TRANSPORT_SPI (1)
152#define H_TRANSPORT_SDIO (2)
170#define H_TRANSPORT_SPI_HD (3)
188#define H_TRANSPORT_UART (4)
207#define H_TRANSPORT_IN_USE (H_TRANSPORT_SPI)
237#define H_SLAVE_TARGET_ESP32C6 (1)
254#define H_SLAVE_TARGET_ESP32 (0)
263#define H_SLAVE_TARGET_ESP32C2 (0)
272#define H_SLAVE_TARGET_ESP32C3 (0)
281#define H_SLAVE_TARGET_ESP32C5 (0)
290#define H_SLAVE_TARGET_ESP32C61 (0)
299#define H_SLAVE_TARGET_ESP32H2 (0)
308#define H_SLAVE_TARGET_ESP32H4 (0)
317#define H_SLAVE_TARGET_ESP32S2 (0)
326#define H_SLAVE_TARGET_ESP32S3 (0)
350#define RA8_ESP_HOSTED_GPIO_PORT(pin_code) ((void*)(uintptr_t)RA8_PIN_PORT(pin_code))
376#define RA8_ESP_HOSTED_GPIO_PIN(pin_code) \
377 (((uint16_t)(pin_code) == (uint16_t)k_ra8_pin_none) ? (-1) : (int)RA8_PIN_PIN(pin_code))
404#define H_GPIO_HANDSHAKE_Port RA8_ESP_HOSTED_GPIO_PORT(k_ra8_esp_hosted_pin_handshake)
422#define H_GPIO_HANDSHAKE_Pin RA8_ESP_HOSTED_GPIO_PIN(k_ra8_esp_hosted_pin_handshake)
438#define H_GPIO_DATA_READY_Port RA8_ESP_HOSTED_GPIO_PORT(k_ra8_esp_hosted_pin_data_ready)
459#define H_GPIO_DATA_READY_Pin RA8_ESP_HOSTED_GPIO_PIN(k_ra8_esp_hosted_pin_data_ready)
475#define H_GPIO_PORT_RESET RA8_ESP_HOSTED_GPIO_PORT(k_ra8_esp_hosted_pin_reset)
492#define H_GPIO_PIN_RESET RA8_ESP_HOSTED_GPIO_PIN(k_ra8_esp_hosted_pin_reset)
520#define H_HANDSHAKE_ACTIVE_HIGH (1)
538#define H_DATAREADY_ACTIVE_HIGH (1)
540#if H_HANDSHAKE_ACTIVE_HIGH
555#define H_HS_VAL_ACTIVE (1)
570#define H_HS_VAL_INACTIVE (0)
589#define H_HS_INTR_EDGE (1)
601#define H_HS_VAL_ACTIVE (0)
611#define H_HS_VAL_INACTIVE (1)
621#define H_HS_INTR_EDGE (0)
625#if H_DATAREADY_ACTIVE_HIGH
639#define H_DR_VAL_ACTIVE (1)
654#define H_DR_VAL_INACTIVE (0)
671#define H_DR_INTR_EDGE (1)
683#define H_DR_VAL_ACTIVE (0)
693#define H_DR_VAL_INACTIVE (1)
703#define H_DR_INTR_EDGE (0)
724#define H_RESET_VAL_ACTIVE (0)
739#define H_RESET_VAL_INACTIVE (1)
761#define H_TRANSPORT_QUEUE_SIZE (20)
808#define H_ESP_HOSTED_HOST (1)
810#ifndef H_ESP_PAYLOAD_HEADER_OFFSET
830#define H_ESP_PAYLOAD_HEADER_OFFSET (12)
851#define H_SPI_FD_CLK_MHZ (5)
esp-hosted port header: optional host features, RPC bounds, counters.
esp-hosted port header: constants for the transports not in use.
THE single point of change for the RA8 <-> ESP32-C6 harness map.