ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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port_esp_hosted_host_config.h
Go to the documentation of this file.
1
83
84#pragma once
85
86#include <stdint.h>
87
88#include "ra8_esp_hosted_pins.h"
89
90/* ----------------------------------------------------------------------- */
91/* Transport identity */
92/* ----------------------------------------------------------------------- */
93
94/*
95 * The core only ever compares these against each other, so the numbering is
96 * free; it is dense and starts at zero so "none" is falsy.
97 */
98
114#define H_TRANSPORT_NONE (0)
115
134#define H_TRANSPORT_SPI (1)
135
152#define H_TRANSPORT_SDIO (2)
153
170#define H_TRANSPORT_SPI_HD (3)
171
188#define H_TRANSPORT_UART (4)
189
207#define H_TRANSPORT_IN_USE (H_TRANSPORT_SPI)
208
209/* ----------------------------------------------------------------------- */
210/* Co-processor part number */
211/* ----------------------------------------------------------------------- */
212
213/*
214 * Exactly one of these is 1; transport_drv.c turns it into the chip id it
215 * expects to read back in the co-processor's boot event, and mismatches are
216 * reported rather than ignored. The upstream macro names carry a legacy role
217 * word this project does not use in its own prose.
218 */
219
237#define H_SLAVE_TARGET_ESP32C6 (1) /* LEGACY-OK: upstream esp-hosted macro name */
238
254#define H_SLAVE_TARGET_ESP32 (0) /* LEGACY-OK: upstream esp-hosted macro name */
255
263#define H_SLAVE_TARGET_ESP32C2 (0) /* LEGACY-OK: upstream esp-hosted macro name */
264
272#define H_SLAVE_TARGET_ESP32C3 (0) /* LEGACY-OK: upstream esp-hosted macro name */
273
281#define H_SLAVE_TARGET_ESP32C5 (0) /* LEGACY-OK: upstream esp-hosted macro name */
282
290#define H_SLAVE_TARGET_ESP32C61 (0) /* LEGACY-OK: upstream esp-hosted macro name */
291
299#define H_SLAVE_TARGET_ESP32H2 (0) /* LEGACY-OK: upstream esp-hosted macro name */
300
308#define H_SLAVE_TARGET_ESP32H4 (0) /* LEGACY-OK: upstream esp-hosted macro name */
309
317#define H_SLAVE_TARGET_ESP32S2 (0) /* LEGACY-OK: upstream esp-hosted macro name */
318
326#define H_SLAVE_TARGET_ESP32S3 (0) /* LEGACY-OK: upstream esp-hosted macro name */
327
328/* ----------------------------------------------------------------------- */
329/* Packed-pin to (void* port, int pin) adapters */
330/* ----------------------------------------------------------------------- */
331
350#define RA8_ESP_HOSTED_GPIO_PORT(pin_code) ((void*)(uintptr_t)RA8_PIN_PORT(pin_code))
351
376#define RA8_ESP_HOSTED_GPIO_PIN(pin_code) \
377 (((uint16_t)(pin_code) == (uint16_t)k_ra8_pin_none) ? (-1) : (int)RA8_PIN_PIN(pin_code))
378
379/* ----------------------------------------------------------------------- */
380/* Side-band pin map */
381/* ----------------------------------------------------------------------- */
382
383/*
384 * Note the upstream spellings: CamelCase _Port / _Pin for HANDSHAKE and
385 * DATA_READY, but a _PORT_ / _PIN_ infix for RESET. Both are verified against
386 * spi_drv.c and esp_hosted_transport_config.c.
387 */
388
403/* NOLINTNEXTLINE(readability-identifier-naming) -- upstream-fixed mixed-case spelling. */
404#define H_GPIO_HANDSHAKE_Port RA8_ESP_HOSTED_GPIO_PORT(k_ra8_esp_hosted_pin_handshake)
405
421/* NOLINTNEXTLINE(readability-identifier-naming) -- upstream-fixed mixed-case spelling. */
422#define H_GPIO_HANDSHAKE_Pin RA8_ESP_HOSTED_GPIO_PIN(k_ra8_esp_hosted_pin_handshake)
423
437/* NOLINTNEXTLINE(readability-identifier-naming) -- upstream-fixed mixed-case spelling. */
438#define H_GPIO_DATA_READY_Port RA8_ESP_HOSTED_GPIO_PORT(k_ra8_esp_hosted_pin_data_ready)
439
458/* NOLINTNEXTLINE(readability-identifier-naming) -- upstream-fixed mixed-case spelling. */
459#define H_GPIO_DATA_READY_Pin RA8_ESP_HOSTED_GPIO_PIN(k_ra8_esp_hosted_pin_data_ready)
460
475#define H_GPIO_PORT_RESET RA8_ESP_HOSTED_GPIO_PORT(k_ra8_esp_hosted_pin_reset)
476
492#define H_GPIO_PIN_RESET RA8_ESP_HOSTED_GPIO_PIN(k_ra8_esp_hosted_pin_reset)
493
494/* ----------------------------------------------------------------------- */
495/* Side-band polarity and interrupt sense */
496/* ----------------------------------------------------------------------- */
497
498/*
499 * The C6 image drives both HANDSHAKE and DATA_READY push-pull and asserts
500 * them HIGH, so both flags are 1 and both edges are rising. The derived
501 * values below follow from the flags, never the other way round.
502 */
503
520#define H_HANDSHAKE_ACTIVE_HIGH (1)
521
538#define H_DATAREADY_ACTIVE_HIGH (1)
539
540#if H_HANDSHAKE_ACTIVE_HIGH
541
555#define H_HS_VAL_ACTIVE (1)
556
570#define H_HS_VAL_INACTIVE (0)
571
589#define H_HS_INTR_EDGE (1)
590
591#else /* active-low HANDSHAKE harness */
592
601#define H_HS_VAL_ACTIVE (0)
602
611#define H_HS_VAL_INACTIVE (1)
612
621#define H_HS_INTR_EDGE (0)
622
623#endif /* H_HANDSHAKE_ACTIVE_HIGH */
624
625#if H_DATAREADY_ACTIVE_HIGH
626
639#define H_DR_VAL_ACTIVE (1)
640
654#define H_DR_VAL_INACTIVE (0)
655
671#define H_DR_INTR_EDGE (1)
672
673#else /* active-low DATA_READY harness */
674
683#define H_DR_VAL_ACTIVE (0)
684
693#define H_DR_VAL_INACTIVE (1)
694
703#define H_DR_INTR_EDGE (0)
704
705#endif /* H_DATAREADY_ACTIVE_HIGH */
706
707/* ----------------------------------------------------------------------- */
708/* Co-processor reset polarity */
709/* ----------------------------------------------------------------------- */
710
724#define H_RESET_VAL_ACTIVE (0)
725
739#define H_RESET_VAL_INACTIVE (1)
740
741/* ----------------------------------------------------------------------- */
742/* Queue depth, pooling and host identity */
743/* ----------------------------------------------------------------------- */
744
761#define H_TRANSPORT_QUEUE_SIZE (20)
762
763/*
764 * H_USE_MEMPOOL is DELIBERATELY LEFT UNDEFINED. Read this before adding it.
765 *
766 * The vendored ``host/esp_hosted_os_abstraction.h`` guards four rows of the
767 * OS-abstraction vtable with ``#ifdef H_USE_MEMPOOL`` -- not ``#if``. So
768 * ``#define H_USE_MEMPOOL (0)`` does NOT turn the feature off: it turns it ON
769 * and grows ``hosted_osi_funcs_t`` by four function pointers. Worse, that
770 * header does not include this one, so the struct would gain or lose those
771 * four rows depending on whether a given translation unit happened to reach
772 * this header first -- two different layouts for one type, in one image, with
773 * no diagnostic from any compiler. Leaving the symbol undefined is what makes
774 * the layout the same everywhere.
775 *
776 * Off is also the right answer on its own merits. Upstream's pool lives in
777 * ``common/mempool/mempool_ll.{c,h}``, whose header includes
778 * ``freertos/FreeRTOS.h``, ``portmacro.h``, ``task.h`` and ``semphr.h``
779 * unconditionally -- it is a FreeRTOS data structure, and this image runs
780 * ThreadX. With the symbol absent, ``transport_util.h`` routes every transport
781 * buffer through ``_h_malloc_align`` instead, which this port serves from a
782 * fixed ThreadX byte pool carved once during initialisation. That is the
783 * bounded, allocate-once, NASA Power of 10 Rule 3 behaviour the upstream pool
784 * existed to provide, one layer down.
785 *
786 * ``CONFIG_ESP_HOSTED_USE_MEMPOOL`` in ``idf_compat/sdkconfig.h`` is tested
787 * with a bare ``#if`` and so is defined to 0 there; the two say the same
788 * thing in the two different dialects their consumers use.
789 */
790
808#define H_ESP_HOSTED_HOST (1)
809
810#ifndef H_ESP_PAYLOAD_HEADER_OFFSET
830#define H_ESP_PAYLOAD_HEADER_OFFSET (12)
831#endif /* H_ESP_PAYLOAD_HEADER_OFFSET */
832
851#define H_SPI_FD_CLK_MHZ (5)
852
866#define H_ENABLE (1)
867
880#define H_DISABLE (0)
881
882/* ----------------------------------------------------------------------- */
883/* Remaining configuration, split by theme */
884/* ----------------------------------------------------------------------- */
885
886/*
887 * Included last so the derivations in these files see the transport and
888 * polarity selections above. A vendored translation unit that names only
889 * this header still gets the complete symbol set.
890 */
891
esp-hosted port header: optional host features, RPC bounds, counters.
esp-hosted port header: constants for the transports not in use.
THE single point of change for the RA8 <-> ESP32-C6 harness map.