ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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lx_nor_ram.h File Reference

RAM-backed standalone-LevelX NOR driver (the ra8_cache_store DIP seam). More...

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Functions

unsigned int lx_nor_ram_init (struct LX_NOR_FLASH_STRUCT *nor_flash)
 LevelX NOR driver-initialise callback over the static SRAM backing.
void lx_nor_ram_wipe (void)
 Erase the entire SRAM backing to the LevelX "erased" pattern.

Detailed Description

RAM-backed standalone-LevelX NOR driver (the ra8_cache_store DIP seam).

A first-party LevelX NOR driver-initialise callback whose "flash" is a static SRAM array. It is the injected ra8_cache_store_nor_init_fn for the ra8_cache_store_demo example, substituting for the production Octo-SPI driver (lx_nor_driver_ra8_xspi_initialize) so the entire persistent-cache path – LevelX standalone plus ra8_cache_store on top of it – runs in SRAM with no MMIO. Because nothing touches a peripheral register, the emulated (ra8_emulator) run and the on-silicon run execute byte-identical instructions: EIL equals HIL by construction.

The backing SRAM persists across lx_nor_flash_close / lx_nor_flash_open within one boot, which models the "reboot: control state lost, on-media content survives" behaviour the persistence-across-remount demonstration needs: re-open a fresh (zeroed) LX_NOR_FLASH control block over the same backing to simulate a power cycle. (A real Octo-SPI part persists across an actual power cycle; this RAM model persists across the in-process remount.)

Note
Single global instance; the store serialises access (one reader core).
Since
0.1.0
Tag
[Ring 6 / APP] {World: S}

Definition in file lx_nor_ram.h.

Function Documentation

◆ lx_nor_ram_init()

unsigned int lx_nor_ram_init ( struct LX_NOR_FLASH_STRUCT * nor_flash)

LevelX NOR driver-initialise callback over the static SRAM backing.

Signature-compatible with ra8_cache_store_nor_init_fn: programs the control block's geometry, the read/write/erase/verify callbacks, and the LevelX per-open sector buffer against the static backing array. Passed straight to lx_nor_flash_open() / lx_nor_flash_format().

Parameters
[in,out]nor_flashLevelX control block to populate.
Returns
0 (LX_SUCCESS) on success; non-zero on a NULL argument.
Return values
0Control block programmed.
1nor_flash was NULL.
Precondition
nor_flash points at caller-owned LevelX control-block storage.
The static backing array is available (always; static storage).
Postcondition
On success all four driver callbacks and the geometry are set.
The backing SRAM is left as-is (open uses it; format erases it).
Note
Not thread-safe; the store serialises access.
Since
0.1.0

Definition at line 188 of file lx_nor_ram.c.

References internal_ram_block_erase(), internal_ram_block_erased_verify(), internal_ram_read(), internal_ram_write(), k_lx_nor_ram_total_blocks, k_lx_nor_ram_words_per_block, s_ram_backing, and s_ram_sector_buf.

Referenced by internal_rcs_build_cfg().

◆ lx_nor_ram_wipe()

void lx_nor_ram_wipe ( void )

Erase the entire SRAM backing to the LevelX "erased" pattern.

Resets the fake NOR media to a blank (unformatted) device. Firmware never needs this – reset zeroes the BSS backing and the first mount formats it – but the host test calls it between independent scenarios that share the one static backing.

Returns
Nothing.
Precondition
The backing array is static storage (always available).
No LevelX operation is mid-flight against the backing.
Postcondition
Every backing word reads as the erased pattern.
A subsequent open sees a blank (unformatted) device.
Note
Not thread-safe; the store serialises access.
Since
0.1.0

Definition at line 204 of file lx_nor_ram.c.

References k_lx_nor_ram_erased, k_lx_nor_ram_total_words, and s_ram_backing.