84 const char c = (char)(uint8_t)value;
145 static uc_hook s_h_itm;
146 (void)uc_hook_add(uc,
167 if (
byte == (uint8_t)
'\n') {
182 for (uint32_t i = 0U; (in[i] !=
'\0') && (n < cap); i++) {
184 if ((c ==
'\\') && (in[i + 1U] !=
'\0')) {
204 out[n++] = (uint8_t)c;
Multi-channel console log store backing the board view's tabbed console.
void board_console_push(board_console_ch_t ch, const char *line)
Append one completed line to a channel ring and the ALL ring.
@ k_board_console_ch_itm
CoreSight ITM/SWO trace ([itm]).
uint32_t decode_escapes(const char *in, uint8_t *out, uint32_t cap)
Decode a C-style escaped –input string into a raw byte buffer.
void emu_console_reset(void)
Implementation of emu_console_reset() – drop the pending ITM line.
static char s_itm_line[k_itm_line_max+1U]
Accumulated current ITM line (flushed on newline or when full).
static void internal_itm_seed_ready(uc_engine *uc)
Seed the ITM "ready" bits into PPB RAM so ra8_log emits.
void emu_console_install(uc_engine *uc)
Implementation of emu_console_install() – ITM seed + STIM0 echo hook.
static char s_uart_line[k_uart_line_max]
Pending [uart] line text.
static void internal_on_itm_stim_write(uc_engine *uc, uc_mem_type type, uint64_t addr, int size, int64_t value, void *user)
UC_HOOK_MEM_WRITE handler for ITM stimulus port 0 – echo the byte.
static uint32_t s_itm_len
Bytes currently buffered in s_itm_line.
void console_tx_sink(uint8_t channel, uint8_t byte)
SCI TX sink: print each transmitted byte (prefixed line + raw mirror).
static uint32_t s_uart_line_len
Chars buffered in the line.
void console_flush_line(uint8_t channel)
Flush the pending [uart] line to injected output sink with its channel prefix.
Emulator text-console surfaces: UART echo, ITM/SWO echo, escapes.
@ k_uart_line_max
Pretty-print line buffer for the [uart] prefix.
@ k_itm_line_max
Max chars buffered before a forced flush.
@ k_itm_tcr_itmena
TCR bit 0: ITM global enable.
@ k_itm_stim_ready
Non-zero STIM0 read = FIFO ready.
@ k_itm_tenr_port0
TENR bit 0: stimulus port 0 enabled.
@ k_scb_demcr_trcena
DEMCR bit 24: trace subsystem enable.
@ k_itm_tenr_addr
ITM Trace Enable Register (port 0).
@ k_scb_demcr_addr
Debug Exception + Monitor Control.
@ k_itm_tcr_addr
ITM Trace Control Register (ITMENA).
@ k_itm_stim0_addr
ITM stimulus port 0 (byte FIFO).
Bounded raw-descriptor I/O seam for the RA8 emulator.
emu_io_result_t priv_emu_io_outf(const char *format,...)
Format bounded text and write it to the injected output descriptor.
Central first-party Unicorn memory access seam.
uc_err emu_mem_write(uc_engine *uc, uint64_t address, const void *bytes, size_t count)
Write guest memory through the central access seam.
#define RA8_INTERNAL
Marker that a function is intended to be static (file-local).