board_periph_xspi.c

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#include <stdint.h>
#include <stdio.h>
#include <string.h>
 
#include "board_console.h"
#include "board_periph_block.h"
#include "emu_host_io_internal.h"

typedef enum : uint32_t {
  k_xspi_console_line_cap = 48U, 
} xspi_console_t;

typedef enum : uint64_t {
  k_xspi_base       = 0x40268000UL, 
  k_xspi_span       = 0x200UL,      
  k_xspi_off_cdctl0 = 0x070UL,      
  k_xspi_off_cdbuf  = 0x080UL,      
  k_xspi_off_ints   = 0x190UL,      
  k_xspi_off_intc   = 0x194UL,      
} xspi_map_t;

typedef enum : uint32_t {
  k_xspi_cdt_pos_cmdsize   = 0U,      
  k_xspi_cdt_pos_datasize  = 5U,      
  k_xspi_cdt_pos_cmd       = 16U,     
  k_xspi_cdt_mask_cmdsize  = 0x3U,    
  k_xspi_cdt_mask_datasize = 0xFU,    
  k_xspi_cdt_mask_cmd      = 0xFFFFU, 
  k_xspi_cdt_byte          = 0xFFU,   
} xspi_cdt_field_t;

typedef enum : uint32_t {
  k_xspi_cdctl0_trreq = 1UL << 0U, 
  k_xspi_ints_cmdcmp  = 1UL << 0U, 
  k_xspi_cdbuf_cdt    = 0U,        
  k_xspi_cdbuf_addr   = 1U,        
  k_xspi_cdbuf_data0  = 2U,        
  k_xspi_cdbuf_data1  = 3U,        
} xspi_ctl_field_t;

typedef enum : uint32_t {
  k_xspi_op_wren  = 0x06U, 
  k_xspi_op_pp    = 0x02U, 
  k_xspi_op_rdsr  = 0x05U, 
  k_xspi_op_rdid  = 0x9FU, 
  k_xspi_op_read  = 0x03U, 
  k_xspi_op_erase = 0x20U, 
} xspi_op_t;

typedef enum : uint32_t {
  k_xspi_flash_size = 0x4000000UL,  
  k_xspi_sector_len = 0x1000UL,     
  k_xspi_words      = 128U,         
  k_xspi_erased     = 0xFFU,        
  k_xspi_status_wel = 0x02U,        
  k_xspi_jedec_cdd0 = 0x001A5A9DUL, 
  k_xspi_byte_bits  = 8U,           
} xspi_lit_t;

typedef enum : uint32_t {
  k_xspi_block_order = 95U, 
} xspi_order_t;

typedef struct {
  uint32_t regs[k_xspi_words]; 
  uint32_t reads;              
  uint32_t writes;             
  uint32_t erases;             
} xspi_state_t;
 
static xspi_state_t s_xspi;

static uint8_t s_xspi_flash_neg[k_xspi_flash_size];

static uint32_t s_xspi_dirty_hi;

RA8_INTERNAL static uint8_t internal_xspi_flash_byte(uint32_t addr)
{
  if (addr >= (uint32_t)k_xspi_flash_size) {
    return (uint8_t)k_xspi_erased;
  }
  return (uint8_t)~s_xspi_flash_neg[addr];
}

RA8_INTERNAL static void internal_xspi_mark_dirty(uint32_t end_excl)
{
  if (end_excl > s_xspi_dirty_hi) {
    s_xspi_dirty_hi = end_excl;
  }
}

RA8_INTERNAL static uint32_t internal_xspi_cdbuf_word(uint32_t w)
{
  return (uint32_t)((k_xspi_off_cdbuf / 4U) + w);
}

RA8_INTERNAL static uint32_t internal_xspi_opcode(uint32_t cdt)
{
  const uint32_t cmdsize =
    (cdt >> (uint32_t)k_xspi_cdt_pos_cmdsize) & (uint32_t)k_xspi_cdt_mask_cmdsize;
  const uint32_t cmdfield = (cdt >> (uint32_t)k_xspi_cdt_pos_cmd) & (uint32_t)k_xspi_cdt_mask_cmd;
  /* internal_make_cdt left-justifies the opcode in the 16-bit CMD field:
   * shift = 8 * (2 - cmdsize). Recover the low opcode byte. */
  const uint32_t shift =
    (uint32_t)k_xspi_byte_bits * (2U - (cmdsize & (uint32_t)k_xspi_cdt_mask_cmdsize));
  return (cmdfield >> shift) & (uint32_t)k_xspi_cdt_byte;
}

RA8_INTERNAL static void internal_xspi_do_read(uint32_t addr, uint32_t n)
{
  uint32_t d0 = 0U;
  uint32_t d1 = 0U;
  for (uint32_t i = 0U; i < n; i++) {
    const uint8_t b = internal_xspi_flash_byte(addr + i);
    if (i < 4U) {
      d0 |= (uint32_t)b << (i * (uint32_t)k_xspi_byte_bits);
    } else {
      d1 |= (uint32_t)b << ((i - 4U) * (uint32_t)k_xspi_byte_bits);
    }
  }
  s_xspi.regs[internal_xspi_cdbuf_word((uint32_t)k_xspi_cdbuf_data0)] = d0;
  s_xspi.regs[internal_xspi_cdbuf_word((uint32_t)k_xspi_cdbuf_data1)] = d1;
  s_xspi.reads++;
  /* Console OSPI tab: one line per manual read command. */
  char ln[k_xspi_console_line_cap];
  (void)snprintf(ln, sizeof(ln), "OSPI rd @0x%06X %uB", (unsigned)addr, (unsigned)n);
  board_console_push(k_board_console_ch_ospi, ln);
}

RA8_INTERNAL static void internal_xspi_do_program(uint32_t addr, uint32_t n)
{
  const uint32_t d0 = s_xspi.regs[internal_xspi_cdbuf_word((uint32_t)k_xspi_cdbuf_data0)];
  const uint32_t d1 = s_xspi.regs[internal_xspi_cdbuf_word((uint32_t)k_xspi_cdbuf_data1)];
  for (uint32_t i = 0U; i < n; i++) {
    if ((addr + i) >= (uint32_t)k_xspi_flash_size) {
      continue;
    }
    const uint32_t w = (i < 4U) ? d0 : d1;
    const uint32_t s = (i < 4U) ? i : (i - 4U);
    const uint8_t  b =
      (uint8_t)((w >> (s * (uint32_t)k_xspi_byte_bits)) & (uint32_t)k_xspi_cdt_byte);
    /* NOR program clears flash bits only: flash &= b. In the inverted store
     * that is neg = ~(~neg & b) = neg | ~b. */
    s_xspi_flash_neg[addr + i] |= (uint8_t)~b;
    internal_xspi_mark_dirty(addr + i + 1U);
  }
  s_xspi.writes++;
  /* Console OSPI tab: one line per page-program command. */
  char ln[k_xspi_console_line_cap];
  (void)snprintf(ln, sizeof(ln), "OSPI pp @0x%06X %uB", (unsigned)addr, (unsigned)n);
  board_console_push(k_board_console_ch_ospi, ln);
}

RA8_INTERNAL static void internal_xspi_do_erase(uint32_t addr)
{
  const uint32_t base = addr & ~((uint32_t)k_xspi_sector_len - 1U);
  if (base >= (uint32_t)k_xspi_flash_size) {
    return;
  }
  /* Erased flash = 0xFF = all-zero bytes in the inverted store. */
  (void)memset(&s_xspi_flash_neg[base], 0, (size_t)k_xspi_sector_len);
  internal_xspi_mark_dirty(base + (uint32_t)k_xspi_sector_len);
  s_xspi.erases++;
}

RA8_INTERNAL static void internal_xspi_exec_command(void)
{
  const uint32_t cdt  = s_xspi.regs[internal_xspi_cdbuf_word((uint32_t)k_xspi_cdbuf_cdt)];
  const uint32_t addr = s_xspi.regs[internal_xspi_cdbuf_word((uint32_t)k_xspi_cdbuf_addr)];
  const uint32_t n =
    (cdt >> (uint32_t)k_xspi_cdt_pos_datasize) & (uint32_t)k_xspi_cdt_mask_datasize;
  switch (internal_xspi_opcode(cdt)) {
    case (uint32_t)k_xspi_op_rdid:
      s_xspi.regs[internal_xspi_cdbuf_word((uint32_t)k_xspi_cdbuf_data0)] =
        (uint32_t)k_xspi_jedec_cdd0;
      break;
    case (uint32_t)k_xspi_op_rdsr:
      s_xspi.regs[internal_xspi_cdbuf_word((uint32_t)k_xspi_cdbuf_data0)] =
        (uint32_t)k_xspi_status_wel;
      break;
    case (uint32_t)k_xspi_op_read:
      internal_xspi_do_read(addr, n);
      break;
    case (uint32_t)k_xspi_op_pp:
      internal_xspi_do_program(addr, n);
      break;
    case (uint32_t)k_xspi_op_erase:
      internal_xspi_do_erase(addr);
      break;
    default:
      break; /* WREN, 8D/1S software reset, mode switches: no flash effect. */
  }
  s_xspi.regs[(uint32_t)(k_xspi_off_ints / 4U)] |= (uint32_t)k_xspi_ints_cmdcmp;
}

RA8_INTERNAL static void internal_xspi_reset(void)
{
  (void)memset(s_xspi.regs, 0, sizeof(s_xspi.regs));
  /* Only the dirty prefix ever left the erased state; sweeping the whole
   * 64 MiB would needlessly commit resident pages in every emulator run. */
  (void)memset(s_xspi_flash_neg, 0, (size_t)s_xspi_dirty_hi);
  s_xspi_dirty_hi = 0U;
  s_xspi.reads    = 0U;
  s_xspi.writes   = 0U;
  s_xspi.erases   = 0U;
}

RA8_INTERNAL static uint64_t internal_xspi_read(uc_engine* uc, uint64_t addr, unsigned size)
{
  (void)uc;
  (void)size;
  const uint64_t off = addr - (uint64_t)k_xspi_base;
  if ((off / 4U) >= (uint64_t)k_xspi_words) {
    return 0U;
  }
  return s_xspi.regs[off / 4U];
}

RA8_INTERNAL static void
internal_xspi_write(uc_engine* uc, uint64_t addr, unsigned size, uint64_t value)
{
  (void)uc;
  (void)size;
  const uint64_t off = addr - (uint64_t)k_xspi_base;
  if ((off / 4U) >= (uint64_t)k_xspi_words) {
    return;
  }
  if (off == (uint64_t)k_xspi_off_intc) {
    /* Write-1-to-clear against INTS. */
    s_xspi.regs[(uint32_t)(k_xspi_off_ints / 4U)] &= ~(uint32_t)value;
    return;
  }
  s_xspi.regs[off / 4U] = (uint32_t)value;
  if ((off == (uint64_t)k_xspi_off_cdctl0) &&
      (((uint32_t)value & (uint32_t)k_xspi_cdctl0_trreq) != 0U)) {
    internal_xspi_exec_command();
    /* TRREQ self-clears on completion. */
    s_xspi.regs[off / 4U] &= ~(uint32_t)k_xspi_cdctl0_trreq;
  }
}

RA8_INTERNAL static void internal_xspi_report(void)
{
  if ((s_xspi.reads == 0U) && (s_xspi.writes == 0U) && (s_xspi.erases == 0U)) {
    return;
  }
  (void)priv_emu_io_errf("  XSPI flash    : %u reads  %u programs  %u erases\n",
                         s_xspi.reads,
                         s_xspi.writes,
                         s_xspi.erases);
}

static const board_periph_block_t s_k_xspi_block = {
  .base   = (uint32_t)k_xspi_base,
  .span   = (uint32_t)k_xspi_span,
  .order  = (uint32_t)k_xspi_block_order,
  .read   = internal_xspi_read,
  .write  = internal_xspi_write,
  .tick   = nullptr,
  .reset  = internal_xspi_reset,
  .report = internal_xspi_report,
  .name   = "XSPI",
};

[[gnu::constructor]] RA8_INTERNAL static void internal_xspi_block_register(void)
{
  board_periph_register_block(&s_k_xspi_block);
}