board_periph_sram.c

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#include <stdint.h>
#include <stdio.h>
 
#include "board_periph_block.h"
#include "emu_host_io_internal.h"

typedef enum : uint64_t {
  k_sram_base      = 0x40002000ULL, 
  k_sram_span      = 0x100ULL,      
  k_sram_off_cr0   = 0x10ULL,       
  k_sram_off_cr3   = 0x1CULL,       
  k_sram_off_esr   = 0x40ULL,       
  k_sram_off_esclr = 0x48ULL,       
  k_sram_off_ear0  = 0x50ULL,       
} sram_geom_t;

typedef enum : uint32_t {
  k_sram_cr_bypass    = 0x80U, 
  k_sram_cr_verify    = 0x1CU, 
  k_sram_cr_mask      = 0xFFU, 
  k_sram_bank_count   = 4U,    
  k_sram_slots_bank   = 2U,    
  k_sram_ear_bank_str = 8U,    
  k_sram_ear_slot_str = 4U,    
  k_sram_byte_bits    = 8U,    
} sram_model_t;

static const uint32_t s_k_sram_bank_data_off[k_sram_bank_count] = {
  0x00000000U, /* SRAM0 @ 0x22000000 */
  0x00080000U, /* SRAM1 @ 0x22080000 */
  0x00100000U, /* SRAM2 @ 0x22100000 */
  0x00180000U, /* SRAM3 @ 0x22180000 */
};

typedef struct {
  uint8_t  shadow[k_sram_span];        
  uint16_t esr;                        
  uint8_t  last_cr[k_sram_bank_count]; 
  uint32_t latch_count;                
} sram_state_t;
 
static sram_state_t s_sram;

RA8_INTERNAL static uint16_t internal_sram_esr_bit(uint32_t bank, uint32_t slot)
{
  const uint32_t pos = (k_sram_slots_bank * bank) + slot;
  return (uint16_t)((uint16_t)1U << (uint16_t)pos);
}

RA8_INTERNAL static void internal_sram_shadow_store(uint64_t off, unsigned size, uint64_t value)
{
  for (unsigned i = 0U; i < size; ++i) {
    const uint64_t at = off + (uint64_t)i;
    if (at < (uint64_t)k_sram_span) {
      s_sram.shadow[at] = (uint8_t)(value >> (k_sram_byte_bits * i));
    }
  }
}

RA8_INTERNAL static uint64_t internal_sram_shadow_load(uint64_t off, unsigned size)
{
  uint64_t v = 0U;
  for (unsigned i = 0U; i < size; ++i) {
    const uint64_t at = off + (uint64_t)i;
    if (at < (uint64_t)k_sram_span) {
      v |= (uint64_t)s_sram.shadow[at] << (k_sram_byte_bits * i);
    }
  }
  return v;
}

RA8_INTERNAL static void internal_sram_latch_bank(uint32_t bank)
{
  s_sram.esr =
    (uint16_t)(s_sram.esr | internal_sram_esr_bit(bank, 0U) | internal_sram_esr_bit(bank, 1U));
  const uint64_t ear0 = k_sram_off_ear0 + ((uint64_t)bank * (uint64_t)k_sram_ear_bank_str);
  internal_sram_shadow_store(ear0, sizeof(uint32_t), (uint64_t)s_k_sram_bank_data_off[bank]);
  internal_sram_shadow_store(ear0 + (uint64_t)k_sram_ear_slot_str,
                             sizeof(uint32_t),
                             (uint64_t)s_k_sram_bank_data_off[bank]);
  s_sram.latch_count++;
}

RA8_INTERNAL static void internal_sram_cr_write(uint32_t bank, uint8_t cr)
{
  bool was_bypass = (s_sram.last_cr[bank] == (uint8_t)k_sram_cr_bypass);
  bool is_verify  = (cr == (uint8_t)k_sram_cr_verify);
  if (was_bypass) {
    if (is_verify) {
      internal_sram_latch_bank(bank);
    }
  }
  s_sram.last_cr[bank] = cr;
}

RA8_INTERNAL static void internal_sram_clear(uint16_t mask)
{
  s_sram.esr = (uint16_t)(s_sram.esr & (uint16_t)~mask);
  for (uint32_t bank = 0U; bank < k_sram_bank_count; ++bank) {
    for (uint32_t slot = 0U; slot < k_sram_slots_bank; ++slot) {
      if ((mask & internal_sram_esr_bit(bank, slot)) != 0U) {
        const uint64_t ear = k_sram_off_ear0 + ((uint64_t)bank * (uint64_t)k_sram_ear_bank_str) +
                             ((uint64_t)slot * (uint64_t)k_sram_ear_slot_str);
        internal_sram_shadow_store(ear, sizeof(uint32_t), 0U);
      }
    }
  }
}

RA8_INTERNAL static uint64_t internal_sram_read(uc_engine* uc, uint64_t addr, unsigned size)
{
  (void)uc;
  const uint64_t off = addr - (uint64_t)k_sram_base;
  if (off == (uint64_t)k_sram_off_esr) {
    return (uint64_t)s_sram.esr;
  }
  return internal_sram_shadow_load(off, size);
}

RA8_INTERNAL static void
internal_sram_write(uc_engine* uc, uint64_t addr, unsigned size, uint64_t value)
{
  (void)uc;
  const uint64_t off = addr - (uint64_t)k_sram_base;
  if (off == (uint64_t)k_sram_off_esclr) {
    internal_sram_clear((uint16_t)value);
    return;
  }
  if (off == (uint64_t)k_sram_off_esr) {
    s_sram.esr = (uint16_t)value;
    return;
  }
  if ((off >= (uint64_t)k_sram_off_cr0) && (off <= (uint64_t)k_sram_off_cr3)) {
    const uint64_t rel = off - (uint64_t)k_sram_off_cr0;
    if ((rel % sizeof(uint32_t)) == 0U) {
      internal_sram_cr_write((uint32_t)(rel / sizeof(uint32_t)),
                             (uint8_t)(value & (uint64_t)k_sram_cr_mask));
    }
  }
  internal_sram_shadow_store(off, size, value);
}

RA8_INTERNAL static void internal_sram_reset(void)
{
  s_sram = (sram_state_t){};
}

RA8_INTERNAL static void internal_sram_report(void)
{
  if (s_sram.latch_count == 0U) {
    return; /* No fault-injection ran: stay quiet. */
  }
  (void)priv_emu_io_errf("  SRAM-ECC      : decoder self-test latches=%u (SRAMESR modeled)\n",
                         s_sram.latch_count);
}

typedef enum : uint32_t {
  k_sram_block_order = 176U, 
} sram_order_t;

static const board_periph_block_t s_k_sram_block = {
  .base   = (uint64_t)k_sram_base,
  .span   = (uint64_t)k_sram_span,
  .order  = (uint32_t)k_sram_block_order,
  .read   = internal_sram_read,
  .write  = internal_sram_write,
  .tick   = nullptr,
  .reset  = internal_sram_reset,
  .report = internal_sram_report,
  .name   = "SRAM-ECC",
};

[[gnu::constructor]] RA8_INTERNAL static void internal_sram_block_register(void)
{
  board_periph_register_block(&s_k_sram_block);
}