board_periph_mram.c

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#include <stdint.h>
#include <stdio.h>
#include <string.h>
 
#include "board_periph_block.h"
#include "emu_host_io_internal.h"

typedef enum : uint64_t {
  k_mram_reg_base    = 0x4013E000UL, 
  k_mram_reg_span    = 0x00000100UL, 
  k_mram_off_msaddr  = 0x0030UL,     
  k_mram_off_mstatr  = 0x0080UL,     
  k_mram_off_mentryr = 0x0084UL,     
} mram_reg_map_t;

typedef enum : uint64_t {
  k_maci_base = 0x40120000UL, 
  k_maci_span = 0x00000010UL, 
} maci_map_t;

typedef enum : uint64_t {
  k_mrpgm_base      = 0x4013F000UL,       
  k_mrpgm_span      = 0x00000100UL,       
  k_mrpgm_words     = 0x00000100UL / 4UL, 
  k_mrpgm_off_mrcps = 0x0010UL,           
} mrpgm_map_t;

typedef enum : uint8_t {
  k_mrcps_ready = 0x20U, 
} mrpgm_status_t;

typedef enum : uint32_t {
  k_mram_mentryr_pe_bit = 0x0080U,     
  k_mram_mstatr_mrdy    = 0x00008000U, 
  k_mram_mstatr_ilglerr = 0x00004000U, 
  k_mram_mstatr_ilgcom  = 0x00800000U, 
} mram_status_t;

typedef enum : uint32_t {
  k_mram_off_mastat   = 0x0010UL, 
  k_mram_mastat_mreae = 0x08U,    
  k_mram_mastat_cmdlk = 0x10U,    
} mram_mastat_t;

typedef enum : uint32_t {
  k_mram_pgm_lo = 0x02E07600UL, 
  k_mram_pgm_hi = 0x02E179F0UL, 
} mram_pgm_window_t;

typedef enum : uint32_t {
  k_maci_cmd_program    = 0xE8U, 
  k_maci_cmd_config_set = 0x40U, 
  k_maci_cmd_word_n     = 0x08U, 
  k_maci_cmd_final      = 0xD0U, 
} maci_cmd_t;

typedef enum : uint8_t {
  k_maci_idle    = 0U, 
  k_maci_opener1 = 1U, 
  k_maci_collect = 2U, 
} maci_state_t;

typedef enum : uint32_t {
  k_mram_reg_words   = (uint32_t)(k_mram_reg_span / 4UL), 
  k_mram_payload_max = 32U,                               
  k_mram_byte_mask   = 0xFFU,                             
  k_mram_hi_shift    = 8U,                                
  k_mram_block_order = 92U,                               
} mram_lit_t;

typedef struct {
  uint32_t regs[k_mram_reg_words];      
  uint32_t pgm_regs[k_mrpgm_words];     
  uint32_t msaddr;                      
  uint8_t  payload[k_mram_payload_max]; 
  uint32_t payload_len;                 
  uint8_t  maci_state;                  
  uint8_t  pe_active;                   
  uint32_t programs;                    
  uint32_t rejected;                    
} mram_state_t;
 
static mram_state_t s_mram;

RA8_INTERNAL static uint64_t internal_mram_reg_read(uc_engine* uc, uint64_t addr, unsigned size)
{
  (void)uc;
  (void)size;
  const uint64_t off = addr - (uint64_t)k_mram_reg_base;
  if (off == (uint64_t)k_mram_off_mentryr) {
    return (s_mram.pe_active != 0U) ? (uint64_t)k_mram_mentryr_pe_bit : 0U;
  }
  if (off == (uint64_t)k_mram_off_mstatr) {
    return (uint64_t)k_mram_mstatr_mrdy; /* command complete, no error bits */
  }
  if ((off / 4U) >= (uint64_t)k_mram_reg_words) {
    return 0U;
  }
  return s_mram.regs[off / 4U];
}

RA8_INTERNAL static void
internal_mram_reg_write(uc_engine* uc, uint64_t addr, unsigned size, uint64_t value)
{
  (void)uc;
  (void)size;
  const uint64_t off = addr - (uint64_t)k_mram_reg_base;
  if (off == (uint64_t)k_mram_off_mentryr) {
    s_mram.pe_active = (((uint32_t)value & (uint32_t)k_mram_mentryr_pe_bit) != 0U) ? 1U : 0U;
  }
  if (off == (uint64_t)k_mram_off_msaddr) {
    s_mram.msaddr = (uint32_t)value;
  }
  if ((off / 4U) < (uint64_t)k_mram_reg_words) {
    s_mram.regs[off / 4U] = (uint32_t)value;
  }
}

RA8_INTERNAL static void internal_maci_reject(void)
{
  s_mram.regs[(uint32_t)k_mram_off_mstatr / 4U] |=
    (uint32_t)k_mram_mstatr_ilgcom | (uint32_t)k_mram_mstatr_ilglerr;
  s_mram.regs[(uint32_t)k_mram_off_mastat / 4U] |=
    (uint32_t)k_mram_mastat_cmdlk | (uint32_t)k_mram_mastat_mreae;
  s_mram.rejected++;
}

RA8_INTERNAL static void internal_maci_commit(uc_engine* uc)
{
  if (s_mram.payload_len == 0U) {
    return;
  }
  /* HUM Ch 59.7.4.5 Table 59.15 p 3592: the Program command only accepts the
   * option-setting / OTP addresses in [k_mram_pgm_lo, k_mram_pgm_hi]. Anything
   * else -- notably the 0x2700_0000 "extra-MRAM data area" that exists in no
   * RA8D2 memory map -- is an illegal command on silicon. This model used to
   * write it straight through to mapped RAM, which let ra8_io_mram_demo round
   * trip in the emulator while the bench returned Error=516 (#170). Reject it
   * here so the emulator reports the bench result. */
  if (s_mram.msaddr < (uint32_t)k_mram_pgm_lo) {
    internal_maci_reject();
    return;
  }
  if (s_mram.msaddr > (uint32_t)k_mram_pgm_hi) {
    internal_maci_reject();
    return;
  }
  (void)emu_mem_write(uc, (uint64_t)s_mram.msaddr, s_mram.payload, (size_t)s_mram.payload_len);
  s_mram.programs++;
}

RA8_INTERNAL static void
internal_maci_write(uc_engine* uc, uint64_t addr, unsigned size, uint64_t value)
{
  (void)addr;
  if (size == 2U) {
    if (s_mram.maci_state == (uint8_t)k_maci_collect) {
      if ((s_mram.payload_len + 2U) <= (uint32_t)k_mram_payload_max) {
        s_mram.payload[s_mram.payload_len] = (uint8_t)(value & (uint64_t)k_mram_byte_mask);
        s_mram.payload[s_mram.payload_len + 1U] =
          (uint8_t)((value >> (uint64_t)k_mram_hi_shift) & (uint64_t)k_mram_byte_mask);
        s_mram.payload_len += 2U;
      }
    }
    return;
  }
  const uint32_t byte = (uint32_t)value & (uint32_t)k_mram_byte_mask;
  /* Either opener (Program 0xE8 or Config-Set 0x40) starts a command; kept as
   * two single-condition checks so the model carries no compound decision. */
  if (byte == (uint32_t)k_maci_cmd_program) {
    s_mram.maci_state = (uint8_t)k_maci_opener1;
    return;
  }
  if (byte == (uint32_t)k_maci_cmd_config_set) {
    s_mram.maci_state = (uint8_t)k_maci_opener1;
    return;
  }
  if ((byte == (uint32_t)k_maci_cmd_word_n) && (s_mram.maci_state == (uint8_t)k_maci_opener1)) {
    s_mram.maci_state  = (uint8_t)k_maci_collect;
    s_mram.payload_len = 0U;
    return;
  }
  if ((byte == (uint32_t)k_maci_cmd_final) && (s_mram.maci_state == (uint8_t)k_maci_collect)) {
    internal_maci_commit(uc);
    s_mram.maci_state = (uint8_t)k_maci_idle;
    return;
  }
  s_mram.maci_state = (uint8_t)k_maci_idle; /* forced-stop / status-clear / unknown */
}

RA8_INTERNAL static uint64_t internal_maci_read(uc_engine* uc, uint64_t addr, unsigned size)
{
  (void)uc;
  (void)addr;
  (void)size;
  return 0U;
}

RA8_INTERNAL static uint64_t internal_mrpgm_read(uc_engine* uc, uint64_t addr, unsigned size)
{
  (void)uc;
  (void)size;
  const uint64_t off = addr - (uint64_t)k_mrpgm_base;
  if (off == (uint64_t)k_mrpgm_off_mrcps) {
    return (uint64_t)k_mrcps_ready; /* always idle-and-ready: no MACI sequencing here. */
  }
  if ((off / 4U) >= (uint64_t)k_mrpgm_words) {
    return 0U;
  }
  return s_mram.pgm_regs[off / 4U]; /* MRCPC0/1 / MRCFLR read back their written value. */
}

RA8_INTERNAL static void
internal_mrpgm_write(uc_engine* uc, uint64_t addr, unsigned size, uint64_t value)
{
  (void)uc;
  (void)size;
  const uint64_t off = addr - (uint64_t)k_mrpgm_base;
  /* MRCPC0/1 (program gate), MRCFLR (flush), MRCPS (W1C error clear): the mapped
   * MRAM window already accepts the direct STR programming, so these only need
   * to shadow so a gate read-back sees the key that was written. */
  if ((off / 4U) < (uint64_t)k_mrpgm_words) {
    s_mram.pgm_regs[off / 4U] = (uint32_t)value;
  }
}

RA8_INTERNAL static void internal_mram_reset(void)
{
  (void)memset(&s_mram, 0, sizeof(s_mram));
}

RA8_INTERNAL static void internal_mram_report(void)
{
  if (s_mram.rejected != 0U) {
    /* Loud: a Program aimed outside HUM Table 59.15's option-setting window
     * is an illegal command on silicon (command-locked, MSTATR.ILGCOMERR). */
    (void)priv_emu_io_errf("  Extra-MRAM    : %u MACI program commands, %u REJECTED "
                           "(MSADDR outside HUM Table 59.15 option-setting window)\n",
                           s_mram.programs,
                           s_mram.rejected);
    return;
  }
  if (s_mram.programs == 0U) {
    return;
  }
  (void)priv_emu_io_errf("  Extra-MRAM    : %u MACI program commands\n", s_mram.programs);
}

static const board_periph_block_t s_k_mram_reg_block = {
  .base   = (uint32_t)k_mram_reg_base,
  .span   = (uint32_t)k_mram_reg_span,
  .order  = (uint32_t)k_mram_block_order,
  .read   = internal_mram_reg_read,
  .write  = internal_mram_reg_write,
  .tick   = nullptr,
  .reset  = internal_mram_reset,
  .report = internal_mram_report,
  .name   = "MRAM",
};

static const board_periph_block_t s_k_maci_block = {
  .base   = (uint32_t)k_maci_base,
  .span   = (uint32_t)k_maci_span,
  .order  = (uint32_t)k_mram_block_order,
  .read   = internal_maci_read,
  .write  = internal_maci_write,
  .tick   = nullptr,
  .reset  = nullptr,
  .report = nullptr,
  .name   = "MACI",
};

static const board_periph_block_t s_k_mrpgm_block = {
  .base   = (uint32_t)k_mrpgm_base,
  .span   = (uint32_t)k_mrpgm_span,
  .order  = (uint32_t)k_mram_block_order,
  .read   = internal_mrpgm_read,
  .write  = internal_mrpgm_write,
  .tick   = nullptr,
  .reset  = nullptr,
  .report = nullptr,
  .name   = "MRAM-pgm",
};

[[gnu::constructor]] RA8_INTERNAL static void internal_mram_block_register(void)
{
  board_periph_register_block(&s_k_mram_reg_block);
  board_periph_register_block(&s_k_maci_block);
  board_periph_register_block(&s_k_mrpgm_block);
}