ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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adc_internal.h File Reference

Cross-TU constants shared by the ADC_B driver split. More...

#include <stdint.h>
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Enumerations

enum  ra8_adc_const_t : uint32_t {
  k_ra8_adc_clk_wait_limit = 100000UL ,
  k_ra8_adc_busy_wait_limit = 2000000UL
}
 Local timing / mask constants shared by the ADC_B driver TUs. More...

Detailed Description

Cross-TU constants shared by the ADC_B driver split.

Tag
[Ring 3 / HAL] {World: NS}

Not part of the public API. The RA8D2 ADC_B HAL driver is split across two translation units:

  • adc.c – converter bring-up, single-channel polling, scan-group orchestration, trigger / window-comparator / oversampling control;
  • adc_selfdiag.c – SIL3 / DO-178C self-diagnosis (modes 1/2/3) plus the internal temperature / reference-voltage extended-analog channel reads.

Both translation units bounded-poll ADSR.ADACT0 to wait for a conversion to finish, so the busy-poll budget below is defined once here. ra8_adc_const_t is the single source of truth for those timing constants.

Since
0.1.0

Definition in file adc_internal.h.

Enumeration Type Documentation

◆ ra8_adc_const_t

enum ra8_adc_const_t : uint32_t

Local timing / mask constants shared by the ADC_B driver TUs.

Enumerator
k_ra8_adc_clk_wait_limit 

ADCLKSR settle-poll budget.

k_ra8_adc_busy_wait_limit 

ADSR.ADACT busy-poll budget.

2M spins on a 1 GHz CPU is ~2 ms wall clock – a sane ADC conversion timeout on real silicon. Host tests leave ADACT0 idle (0) in the RAM-backed window, so the poll completes on its first read; nothing races this budget.

Definition at line 41 of file adc_internal.h.