41typedef enum : uint32_t {
74typedef enum : uint32_t {
115typedef enum : uint32_t {
ra8_clock_hz_t
Expected clock frequencies after PLL bring-up.
@ k_ra8_hoco_hz
High-speed on-chip oscillator.
@ k_ra8_mriclk_hz
MRICLK = PLL1P/4 = 250 MHz (MRAM I/F).
@ k_ra8_pll1r_hz
PLL1R = (24/3)*250/5 = 400 MHz.
@ k_ra8_pclka_hz
PCLKA = PLL1P/8 = 125 MHz.
@ k_ra8_cpuclk1_hz
CPUCLK1 = PLL1P/4 = 250 MHz.
@ k_ra8_cpuclk0_hz
CPUCLK0 = PLL1P/1 = 1 GHz.
@ k_ra8_pclkb_hz
PCLKB = PLL1P/16 = 62.5 MHz.
@ k_ra8_moco_hz
Middle-speed on-chip oscillator.
@ k_ra8_fclk_hz
FCK (MRPCLK) = PLL1P/8 = 125 MHz.
@ k_ra8_loco_hz
Low-speed on-chip oscillator.
@ k_ra8_bclk_hz
BCLK = PLL1P/8 = 125 MHz.
@ k_ra8_pclkd_hz
PCLKD = PLL1P/4 = 250 MHz.
@ k_ra8_pll1q_hz
PLL1Q = (24/3)*250/6 ~= 333 MHz.
@ k_ra8_pclke_hz
PCLKE = PLL1P/4 = 250 MHz.
@ k_ra8_pll1p_hz
PLL1P = (24/3)*250/2 = 1000 MHz.
@ k_ra8_pclkc_hz
PCLKC = PLL1P/8 = 125 MHz.
@ k_ra8_xtal_hz
24 MHz main crystal on EK-RA8D2.
@ k_ra8_iclk_hz
ICLK = PLL1P/4 = 250 MHz.
@ k_ra8_iclk_max_hz
Highest ICLK the part is rated for.
ra8_time_unit_t
Integer conversion factors between common time units.
@ k_ra8_us_per_ms
Microseconds per millisecond.
@ k_ra8_sec_per_day
Seconds per day.
@ k_ra8_ms_per_sec
Milliseconds per second.
@ k_ra8_hour_per_day
Hours per day.
@ k_ra8_sec_per_min
Seconds per minute.
@ k_ra8_ns_per_us
Nanoseconds per microsecond.
@ k_ra8_sec_per_hour
Seconds per hour.
@ k_ra8_us_per_sec
Microseconds per second.
@ k_ra8_ns_per_ms
Nanoseconds per millisecond.
@ k_ra8_min_per_hour
Minutes per hour.
@ k_ra8_ns_per_sec
Nanoseconds per second.
ra8_timeout_ms_t
Canonical timeouts used across drivers.
@ k_ra8_timeout_very_long_ms
10 s – boot / recovery.
@ k_ra8_timeout_none_ms
Poll once, never block.
@ k_ra8_timeout_default_ms
100 ms – default.
@ k_ra8_timeout_short_ms
10 ms – quick bus op.
@ k_ra8_timeout_long_ms
1 s – slow devices.
1.16.1