ra8_rmac_phy.c

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#include "ra8_rmac_phy.h"
 
#include <stdint.h>
 
#include "ra8_attributes.h"
#include "ra8_check.h"
#include "ra8_err.h"
#include "ra8_log.h"
#include "ra8_rmac_phy_internal.h"

bool priv_ra8_rmac_phy_internal_speed_ok(ra8_err_t err, uint16_t reg_value, uint16_t mask)
{
  return (err == k_ra8_ok) && ((reg_value & mask) != 0U);
}
 
static const char* s_tag = "RMPHY";
 
typedef enum : uint8_t {
  k_ra8_rmac_phy_reg_control      = 0U,  
  k_ra8_rmac_phy_reg_status       = 1U,  
  k_ra8_rmac_phy_reg_an_advert    = 4U,  
  k_ra8_rmac_phy_reg_an_partner   = 5U,  
  k_ra8_rmac_phy_reg_1000t_ctrl   = 9U,  
  k_ra8_rmac_phy_reg_1000t_status = 10U, 
  k_ra8_rmac_phy_reset_poll_max   = 32U, 
} ra8_rmac_phy_reg_t;
 
typedef enum : uint16_t {
  k_ra8_rmac_phy_bmcr_reset       = 0x8000U, 
  k_ra8_rmac_phy_bmcr_an_enable   = 0x1000U, 
  k_ra8_rmac_phy_bmcr_an_restart  = 0x0200U, 
  k_ra8_rmac_phy_bmsr_link_up     = 0x0004U, 
  k_ra8_rmac_phy_bmsr_an_complete = 0x0020U, 
  k_ra8_rmac_phy_lpa_100full      = 0x0100U, 
  k_ra8_rmac_phy_lpa_100half      = 0x0080U, 
  k_ra8_rmac_phy_lpa_10full       = 0x0040U, 
  k_ra8_rmac_phy_lpa_10half       = 0x0020U, 
  k_ra8_rmac_phy_msr_1000full     = 0x0800U, 
  k_ra8_rmac_phy_msr_1000half     = 0x0400U, 
} ra8_rmac_phy_bits_t;
 
typedef struct {
  bool               opened;          
  uint8_t            phy_address;     
  ra8_rmac_phy_lsi_t lsi_type;        
  uint16_t           local_advertise; 
  uint16_t           gbit_advertise;  
  ra8_rmac_phy_io_t  io;              
  uint16_t           last_bmsr;       
} ra8_rmac_phy_internal_t;
 
static ra8_rmac_phy_internal_t s_state = {};

RA8_INTERNAL
static ra8_err_t internal_open_validate(const ra8_rmac_phy_cfg_t* cfg)
{
  RA8_CHECK_NULL_PTR(cfg, s_tag, "cfg must not be nullptr");
  RA8_CHECK_NULL_PTR(cfg->io.read, s_tag, "io.read required");
  RA8_CHECK_NULL_PTR(cfg->io.write, s_tag, "io.write required");
  if (cfg->phy_address > k_ra8_rmac_phy_addr_max) {
    return k_ra8_err_invalid_arg;
  }
  if ((uint8_t)cfg->lsi_type >= k_ra8_rmac_phy_lsi_count) {
    return k_ra8_err_invalid_arg;
  }
  return k_ra8_ok;
}

RA8_INTERNAL
static ra8_err_t internal_reset_and_wait(uint16_t poll_max)
{
  ra8_err_t err = s_state.io.write(s_state.io.ctx,
                                   s_state.phy_address,
                                   k_ra8_rmac_phy_reg_control,
                                   k_ra8_rmac_phy_bmcr_reset);
  if (err != k_ra8_ok) {
    return err;
  }
  for (uint16_t i = 0U; i < poll_max; ++i) {
    uint16_t reg = 0U;
    err = s_state.io.read(s_state.io.ctx, s_state.phy_address, k_ra8_rmac_phy_reg_control, &reg);
    if (err != k_ra8_ok) {
      return err;
    }
    if ((reg & k_ra8_rmac_phy_bmcr_reset) == 0U) {
      return k_ra8_ok;
    }
  }
  return k_ra8_err_hw_timeout;
}

RA8_INTERNAL
static ra8_err_t internal_program_advertise(void)
{
  ra8_err_t err = s_state.io.write(s_state.io.ctx,
                                   s_state.phy_address,
                                   k_ra8_rmac_phy_reg_an_advert,
                                   s_state.local_advertise);
  if (err != k_ra8_ok) {
    return err;
  }
  if (s_state.gbit_advertise != 0U) {
    err = s_state.io.write(s_state.io.ctx,
                           s_state.phy_address,
                           k_ra8_rmac_phy_reg_1000t_ctrl,
                           s_state.gbit_advertise);
    if (err != k_ra8_ok) {
      return err;
    }
  }
  return k_ra8_ok;
}

ra8_err_t ra8_rmac_phy_open(const ra8_rmac_phy_cfg_t* cfg)
{
  const ra8_err_t varg = internal_open_validate(cfg);
  if (varg != k_ra8_ok) {
    return varg;
  }
  if (s_state.opened) {
    return k_ra8_err_exists;
  }
  s_state.opened          = true;
  s_state.phy_address     = cfg->phy_address;
  s_state.lsi_type        = cfg->lsi_type;
  s_state.local_advertise = cfg->local_advertise;
  s_state.gbit_advertise  = cfg->gbit_advertise;
  s_state.io              = cfg->io;
  s_state.last_bmsr       = 0U;
 
  const uint16_t poll_max =
    (cfg->reset_poll_max == 0U) ? k_ra8_rmac_phy_reset_poll_max : cfg->reset_poll_max;
  ra8_err_t err = internal_reset_and_wait(poll_max);
  if (err != k_ra8_ok) {
    s_state.opened = false;
    return err;
  }
 
  err = internal_program_advertise();
  if (err != k_ra8_ok) {
    s_state.opened = false;
    return err;
  }
  ra8_log_info_val(s_tag, "rmac phy lsi", (uint32_t)cfg->lsi_type);
  return k_ra8_ok;
}

ra8_err_t ra8_rmac_phy_close(void)
{
  if (!s_state.opened) {
    return k_ra8_err_invalid_state;
  }
  s_state.opened = false;
  return k_ra8_ok;
}

ra8_err_t ra8_rmac_phy_mdio_read(uint8_t reg_addr, uint16_t* out_data)
{
  RA8_CHECK_NULL_PTR(out_data, s_tag, "out_data must not be nullptr");
  if (!s_state.opened) {
    return k_ra8_err_not_initialized;
  }
  if (reg_addr > k_ra8_rmac_phy_reg_max) {
    return k_ra8_err_invalid_arg;
  }
  return s_state.io.read(s_state.io.ctx, s_state.phy_address, reg_addr, out_data);
}

ra8_err_t ra8_rmac_phy_mdio_write(uint8_t reg_addr, uint16_t data)
{
  if (!s_state.opened) {
    return k_ra8_err_not_initialized;
  }
  if (reg_addr > k_ra8_rmac_phy_reg_max) {
    return k_ra8_err_invalid_arg;
  }
  return s_state.io.write(s_state.io.ctx, s_state.phy_address, reg_addr, data);
}

ra8_err_t ra8_rmac_phy_auto_negotiate_start(void)
{
  if (!s_state.opened) {
    return k_ra8_err_not_initialized;
  }
  const uint16_t bmcr = (uint16_t)(k_ra8_rmac_phy_bmcr_an_enable | k_ra8_rmac_phy_bmcr_an_restart);
  return s_state.io.write(s_state.io.ctx, s_state.phy_address, k_ra8_rmac_phy_reg_control, bmcr);
}

RA8_INTERNAL
static void internal_resolve_speed(ra8_rmac_phy_link_t* out)
{
  ra8_err_t err = k_ra8_ok;
  /* 1000T status first; if no gbit, fall back to LPA. */
  if (s_state.gbit_advertise != 0U) {
    uint16_t msr = 0U;
    err =
      s_state.io.read(s_state.io.ctx, s_state.phy_address, k_ra8_rmac_phy_reg_1000t_status, &msr);
    if (priv_ra8_rmac_phy_internal_speed_ok(err, msr, (uint16_t)k_ra8_rmac_phy_msr_1000full)) {
      out->speed = k_ra8_rmac_phy_speed_1000f;
      return;
    }
    if (priv_ra8_rmac_phy_internal_speed_ok(err, msr, (uint16_t)k_ra8_rmac_phy_msr_1000half)) {
      out->speed = k_ra8_rmac_phy_speed_1000h;
      return;
    }
  }
  uint16_t lpa = 0U;
  err = s_state.io.read(s_state.io.ctx, s_state.phy_address, k_ra8_rmac_phy_reg_an_partner, &lpa);
  if (err == k_ra8_ok) {
    out->partner_ability = lpa;
    if ((lpa & k_ra8_rmac_phy_lpa_100full) != 0U) {
      out->speed = k_ra8_rmac_phy_speed_100f;
    } else if ((lpa & k_ra8_rmac_phy_lpa_100half) != 0U) {
      out->speed = k_ra8_rmac_phy_speed_100h;
    } else if ((lpa & k_ra8_rmac_phy_lpa_10full) != 0U) {
      out->speed = k_ra8_rmac_phy_speed_10f;
    } else if ((lpa & k_ra8_rmac_phy_lpa_10half) != 0U) {
      out->speed = k_ra8_rmac_phy_speed_10h;
    }
  }
}

ra8_err_t ra8_rmac_phy_link_status_get(ra8_rmac_phy_link_t* out)
{
  RA8_CHECK_NULL_PTR(out, s_tag, "out must not be nullptr");
  if (!s_state.opened) {
    return k_ra8_err_not_initialized;
  }
  uint16_t  bmsr = 0U;
  ra8_err_t err =
    s_state.io.read(s_state.io.ctx, s_state.phy_address, k_ra8_rmac_phy_reg_status, &bmsr);
  if (err != k_ra8_ok) {
    return err;
  }
  s_state.last_bmsr    = bmsr;
  out->bmsr            = bmsr;
  out->link_up         = (uint8_t)(((bmsr & k_ra8_rmac_phy_bmsr_link_up) != 0U) ? 1U : 0U);
  out->auto_neg_done   = (uint8_t)(((bmsr & k_ra8_rmac_phy_bmsr_an_complete) != 0U) ? 1U : 0U);
  out->speed           = k_ra8_rmac_phy_speed_no_link;
  out->partner_ability = 0U;
 
  if ((out->link_up != 0U) && (out->auto_neg_done != 0U)) {
    internal_resolve_speed(out);
  }
  return k_ra8_ok;
}

ra8_err_t ra8_rmac_phy_lsi_get(ra8_rmac_phy_lsi_t* out)
{
  RA8_CHECK_NULL_PTR(out, s_tag, "out must not be nullptr");
  if (!s_state.opened) {
    return k_ra8_err_not_initialized;
  }
  *out = s_state.lsi_type;
  return k_ra8_ok;
}