ra8_npu_model_addk_fake.h

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/*
 * Copyright (c) 2026 Brighton Sikarskie
 * SPDX-License-Identifier: MIT
 *
 * GENERATED by tools/vela/src/vela_gen.py from tools/vela/models/addk_fake.json.
 * DO NOT EDIT BY HAND. Regenerate with `just quality::local::vela_regen`; the
 * committed copy is diffed by `just quality::local::vela_check` (needs no Vela).
 *
 * A '.npub' Ethos-U55 model container (see libs/ra8_hal/inc/ra8_npu_blob.h):
 * an Ethos-U55 command stream plus its tensor region layout, baked as a byte
 * array the firmware links and the on-target loader (ra8_npu_loader.h) maps
 * into an ra8_npu_job_t. The command stream here is the documented SE55 stand-in
 * convention (ra8_npu_fake_cmd.h), NOT a real Vela program -- see vela_gen.py.
 */
 
#pragma once
 
#include <stdint.h>

static const uint8_t s_ra8_npu_model_addk_fake_data[] = {
  0x4E, 0x50, 0x55, 0x31, 0x01, 0x00, 0x00, 0x00, 0xE4, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
  0x50, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x47, 0x1D, 0x0E, 0x41,
  0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00,
  0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x00,
  0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  0x02, 0x00, 0x55, 0x5E, 0x01, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
  0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  0x00, 0x00, 0x00, 0x00, 0x03, 0x0A, 0x11, 0x18, 0x1F, 0x26, 0x2D, 0x34, 0x3B, 0x42, 0x49, 0x50,
  0x57, 0x5E, 0x65, 0x6C, 0x73, 0x7A, 0x81, 0x88, 0x8F, 0x96, 0x9D, 0xA4, 0xAB, 0xB2, 0xB9, 0xC0,
  0xC7, 0xCE, 0xD5, 0xDC, 0xE3, 0xEA, 0xF1, 0xF8, 0xFF, 0x06, 0x0D, 0x14, 0x1B, 0x22, 0x29, 0x30,
  0x37, 0x3E, 0x45, 0x4C, 0x53, 0x5A, 0x61, 0x68, 0x6F, 0x76, 0x7D, 0x84, 0x8B, 0x92, 0x99, 0xA0,
  0xA7, 0xAE, 0xB5, 0xBC,
};

static inline const uint8_t* ra8_npu_model_addk_fake_blob(void)
{
  return s_ra8_npu_model_addk_fake_data;
}

static inline uint32_t ra8_npu_model_addk_fake_bytes(void)
{
  return (uint32_t)sizeof(s_ra8_npu_model_addk_fake_data);
}