ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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linker_script_fixtures.py
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1#!/usr/bin/env python3
2# SPDX-License-Identifier: MIT
3# Copyright (c) 2026 Brighton Sikarskie
4"""Whole-file selftest fixtures for ``check_linker_scripts.py``.
5
6This module is DATA only: the deliberately malformed and deliberately-tricky
7linker scripts the checker's ``--selftest`` drives its rules against. The
8enforcement logic and the builder-style fixtures that need the checker's own
9tables (``_synth_option_script``, ``_sram_fixture``) stay in
10``check_linker_scripts.py``.
11
12The split is deliberate and follows ``lint_coverage_rules.py``: keeping the
13static fixtures here means neither file drifts toward being the 1000-line
14checker the file-size gate rejects, and a fixture edit is reviewable on its own.
15
16Nothing here imports the checker, so the two files cannot form an import cycle.
17"""
18
19# A malformed script: no licence header, a region missing LENGTH, a tab indent,
20# and an output section placed in a typo'd region. Must draw LD001-LD005.
21MALFORMED = """\
22/* A linker script with no licence header. */
23MEMORY
24{
25 FLASH (rx) : ORIGIN = 0x00000000
26 RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
27}
28SECTIONS
29{
30\t.text : { *(.text) } > FLSAH
31 .data : { *(.data) } > RAM
32}
33"""
34
35# Legal but deliberately awkward: ENTRY and a bogus region name appear inside
36# comments, a region name is a substring of another, and the header sits below
37# a long banner. Nothing here is a real finding.
38TRICKY = """\
39/*
40 * A perfectly legal script that mentions ENTRY(bogus_reset) and a
41 * region called NOWHERE inside this comment, and places nothing in
42 * either. It also talks about > NOWHERE as prose.
43 *
44 * Copyright (c) 2026 Brighton Sikarskie
45 * SPDX-License-Identifier: MIT
46 */
47
48ENTRY(Reset_Handler)
49
50MEMORY
51{
52 RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
53 RAM_EXT (rwx) : ORIGIN = 0x60000000, LENGTH = 8M
54}
55
56SECTIONS
57{
58 .text : { *(.text) } > RAM_EXT
59 .data : { *(.data) } > RAM AT> RAM_EXT
60}
61"""
62
63
64# Option-setting layout: a phantom data-flash region plus a wrong OFS0 address
65# (both must draw LD007), and a correct-address twin that must stay silent.
66OFS_BAD = """\
67/*
68 * Copyright (c) 2026 Brighton Sikarskie
69 * SPDX-License-Identifier: MIT
70 */
71
72ENTRY(Reset_Handler)
73
74MEMORY
75{
76 MRAM (rx) : ORIGIN = 0x02000000, LENGTH = 1024K
77 DATA_FLASH (rw) : ORIGIN = 0x27000000, LENGTH = 16K
78 OFS_CFG (r) : ORIGIN = 0x02C9F000, LENGTH = 2K
79}
80
81PROVIDE(OFS0_ADDR = 0x0300A100);
82
83SECTIONS
84{
85 .text : { *(.text) } > MRAM
86 .option_setting_ofs0 OFS0_ADDR : { KEEP(*(.option_setting_ofs0)) } > OFS_CFG
87}
88"""
89
90OFS_GOOD = """\
91/*
92 * Copyright (c) 2026 Brighton Sikarskie
93 * SPDX-License-Identifier: MIT
94 */
95
96ENTRY(Reset_Handler)
97
98MEMORY
99{
100 MRAM (rx) : ORIGIN = 0x02000000, LENGTH = 1024K
101 OFS_CFG (r) : ORIGIN = 0x02C9F000, LENGTH = 2K
102}
103
104PROVIDE(OFS0_ADDR = 0x02C9F040);
105
106SECTIONS
107{
108 .text : { *(.text) } > MRAM
109 .option_setting_ofs0 OFS0_ADDR : { KEEP(*(.option_setting_ofs0)) } > OFS_CFG
110}
111"""