ra8-firmware 0.1.0
Bare-metal firmware for the Renesas RA8 family (RA8D2 / RA8P1)
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cam_ceu.h
Go to the documentation of this file.
1
18
19#pragma once
20
21#include <stdint.h>
22
23#include "ra8_err.h"
24
26typedef struct {
27 uint32_t vsync_edges;
28 uint32_t hsync_edges;
29 uint32_t hsync_high_min;
30 uint32_t hsync_high_max;
31 uint32_t hsync_low_min;
32 uint32_t hsync_low_max;
35 uint32_t pclk_edges;
37 uint32_t data_samples;
38 uint32_t data_changes;
39 uint32_t measured_lines;
40 uint32_t line_pclk_min;
41 uint32_t line_pclk_max;
42 uint32_t line_pclk_mean;
43 uint32_t line_pclk_long;
44 uint8_t data_min;
45 uint8_t data_max;
46 uint8_t data_and;
47 uint8_t data_or;
49
ra8_err_t cam_probe_sync_activity(cam_ceu_sync_probe_t *out_probe)
Measure DVP sync, clock, and data activity before CEU routing.
Definition cam_ceu.c:420
Error Code Definitions for ra8-firmware.
ra8_err_codes_t ra8_err_t
Canonical error-return type used by every ra8-firmware API.
Definition ra8_err.h:546
Snapshot of DVP sync activity observed through GPIO input samples.
Definition cam_ceu.h:26
uint32_t vsync_edges
Observed VIO_VD transitions.
Definition cam_ceu.h:27
uint32_t hsync_edges
Observed VIO_HD transitions.
Definition cam_ceu.h:28
uint32_t measured_lines
Completed HREF pulses measured in PCLK edges.
Definition cam_ceu.h:39
uint8_t data_and
AND reduction of sampled VIO_D[7:0].
Definition cam_ceu.h:46
uint32_t hsync_high_cycles_min
Shortest high run, CPU cycles.
Definition cam_ceu.h:33
uint32_t hsync_low_min
Shortest observed low run, samples.
Definition cam_ceu.h:31
uint32_t line_pclk_long
HREF pulses exceeding 1024 sampled PCLK rises.
Definition cam_ceu.h:43
uint8_t data_min
Minimum sampled VIO_D[7:0] value.
Definition cam_ceu.h:44
uint32_t pclk_edges
Observed VIO_CLK transitions.
Definition cam_ceu.h:35
uint32_t pclk_half_cycles_min
Shortest observed VIO_CLK half-period.
Definition cam_ceu.h:36
uint32_t hsync_high_max
Longest observed high run, samples.
Definition cam_ceu.h:30
uint8_t data_or
OR reduction of sampled VIO_D[7:0].
Definition cam_ceu.h:47
uint32_t line_pclk_mean
Mean PCLK rises inside measured HREF pulses.
Definition cam_ceu.h:42
uint32_t line_pclk_max
Maximum PCLK rises inside one HREF pulse.
Definition cam_ceu.h:41
uint32_t line_pclk_min
Minimum PCLK rises inside one HREF pulse.
Definition cam_ceu.h:40
uint32_t data_samples
Data bytes sampled on active-line PCLK rises.
Definition cam_ceu.h:37
uint8_t data_max
Maximum sampled VIO_D[7:0] value.
Definition cam_ceu.h:45
uint32_t hsync_high_min
Shortest observed high run, samples.
Definition cam_ceu.h:29
uint32_t data_changes
Changes between consecutive sampled bytes.
Definition cam_ceu.h:38
uint32_t hsync_low_max
Longest observed low run, samples.
Definition cam_ceu.h:32
uint32_t hsync_high_cycles_max
Longest high run, CPU cycles.
Definition cam_ceu.h:34