board_periph_sci.c

Go to the documentation of this file.

 
#include <stdint.h>
#include <stdio.h>
 
#include "board_console.h"
#include "board_periph.h"
#include "board_periph_block.h"
#include "board_periph_modem.h"
#include "board_periph_sd.h"
#include "emu_host_io_internal.h"

typedef enum : uint64_t {
  k_sci_base      = 0x40358000UL,   
  k_sci_stride    = 0x100UL,        
  k_sci_count     = 10UL,           
  k_sci_span      = 0x100UL * 10UL, 
  k_sci_off_rdr   = 0x00UL,         
  k_sci_off_tdr   = 0x04UL,         
  k_sci_off_ccr0  = 0x08UL,         
  k_sci_off_csr   = 0x48UL,         
  k_sci_off_frsr  = 0x50UL,         
  k_sci_off_ftsr  = 0x54UL,         
  k_sci_off_cfclr = 0x68UL,         
  k_sci_off_ffclr = 0x70UL,         
} sci_map_t;

typedef enum : uint32_t {
  k_sci_ccr0_re   = 0x00000001U, 
  k_sci_ccr0_te   = 0x00000010U, 
  k_sci_ccr0_rie  = 0x00010000U, 
  k_sci_ccr0_tie  = 0x00100000U, 
  k_sci_ccr0_teie = 0x00200000U, 
} sci_ccr0_bit_t;

typedef enum : uint32_t {
  k_sci_csr_rxdmon = 0x00008000U, 
  k_sci_csr_tdre   = 0x20000000U, 
  k_sci_csr_tend   = 0x40000000U, 
  k_sci_csr_rdrf   = 0x80000000U, 
} sci_csr_bit_t;

typedef enum : uint32_t {
  k_sci_frsr_dr   = 0x00000001U, 
  k_sci_frsr_rdf  = 0x00000040U, 
  k_sci_ftsr_tdfe = 0x00000040U, 
} sci_fifo_bit_t;

typedef enum : uint32_t {
  k_sci_cfclr_rdrfc = 0x80000000U, 
  k_sci_ffclr_drc   = 0x00000001U, 
} sci_clr_bit_t;

typedef enum : uint16_t {
  k_event_sci8_rxi = 0x122U, 
  k_event_sci8_txi = 0x123U, 
  k_event_sci8_tei = 0x124U, 
} sci_elc_event_t;

typedef enum : uint32_t {
  k_sci_console_ch     = 8U,    
  k_sci_sd_ch          = 0U,    
  k_sci_rx_queue_len   = 512U,  
  k_sci_data_mask      = 0xFFU, 
  k_uart_line_cap      = 512U,  
  k_sci_spi_cipo_idle  = 0xFFU, 
  k_sci_modem_resp_cap = 96U,   
} sci_tune_t;

typedef struct {
  uint32_t ccr0;                   
  uint32_t transmitted;            
  uint32_t received;               
  uint8_t  rx[k_sci_rx_queue_len]; 
  uint32_t rx_head;                
  uint32_t rx_tail;                
  uint32_t rx_dropped;             
} sci_state_t;
 
static sci_state_t s_sci[k_sci_count];

static void (*s_sci_tx_sink)(uint8_t channel, uint8_t byte);
 
/* Last complete console line, latched on newline so the board view can show
 * what a non-display example printed (e.g. "hello, ra8d2!"). s_uart_pend
 * accumulates the in-flight line; s_uart_last holds the last finished one. The
 * deeper scrollback ring now lives in board_console (the UART channel), which
 * the board view's tabbed console reads back -- this model just latches the last
 * line and routes each completed line there. */
static char     s_uart_last[k_uart_line_cap]; 
static char     s_uart_pend[k_uart_line_cap]; 
static uint32_t s_uart_pend_len;              
 
void board_periph_sci_set_tx_sink(void (*sink)(uint8_t channel, uint8_t byte))
{
  s_sci_tx_sink = sink;
}
 
uint8_t board_periph_sci_console_channel(void)
{
  return (uint8_t)k_sci_console_ch;
}
 
void board_periph_sci_feed_rx(uint8_t channel, const uint8_t* data, uint32_t len)
{
  if ((channel >= (uint32_t)k_sci_count) || (data == nullptr)) {
    return;
  }
  sci_state_t* s = &s_sci[channel];
  for (uint32_t i = 0U; i < len; i++) {
    const uint32_t next = (s->rx_tail + 1U) % (uint32_t)k_sci_rx_queue_len;
    if (next == s->rx_head) {
      s->rx_dropped += (len - i); /* ring full: drop the remaining bytes */
      if (board_periph_trace()) {
        (void)priv_emu_io_errf("  [trace] SCI%u RX queue full, dropped %u bytes\n",
                               channel,
                               len - i);
      }
      return;
    }
    s->rx[s->rx_tail] = data[i];
    s->rx_tail        = next;
  }
}
 
const char* board_periph_uart_last_line(void)
{
  return s_uart_last;
}
 
uint32_t board_periph_uart_tx_total(void)
{
  uint32_t total = 0U;
  for (uint32_t ch = 0U; ch < (uint32_t)k_sci_count; ch++) {
    total += s_sci[ch].transmitted;
  }
  return total;
}

RA8_INTERNAL static bool internal_sci_rx_available(const sci_state_t* s)
{
  return s->rx_head != s->rx_tail;
}

RA8_INTERNAL static uint32_t internal_sci_csr_value(const sci_state_t* s)
{
  /* TDRE + TEND are held set so ra8_sci's "wait for transmit empty / end" polls
   * (ra8_sci_putc_polling on TDRE, internal_wait_tx_end on TEND) fall through.
   * RXDMON reads high because an idle UART line idles high. RDRF tracks the
   * host RX queue so ra8_sci_getc_polling completes only when a byte is ready. */
  uint32_t csr = (uint32_t)k_sci_csr_tdre | (uint32_t)k_sci_csr_tend | (uint32_t)k_sci_csr_rxdmon;
  if (internal_sci_rx_available(s)) {
    csr |= (uint32_t)k_sci_csr_rdrf;
  }
  return csr;
}

RA8_INTERNAL static uint64_t internal_sci_reg_read(uint32_t ch, uint64_t off)
{
  sci_state_t* s = &s_sci[ch];
  if (off == (uint64_t)k_sci_off_rdr) {
    if (!internal_sci_rx_available(s)) {
      return 0U; /* drained: nothing queued */
    }
    const uint8_t b = s->rx[s->rx_head];
    s->rx_head      = (s->rx_head + 1U) % (uint32_t)k_sci_rx_queue_len;
    s->received++;
    return (uint64_t)b;
  }
  if (off == (uint64_t)k_sci_off_csr) {
    return internal_sci_csr_value(s);
  }
  if (off == (uint64_t)k_sci_off_ccr0) {
    return s->ccr0;
  }
  if (off == (uint64_t)k_sci_off_frsr) {
    return internal_sci_rx_available(s) ? ((uint32_t)k_sci_frsr_dr | (uint32_t)k_sci_frsr_rdf) : 0U;
  }
  if (off == (uint64_t)k_sci_off_ftsr) {
    return (uint32_t)k_sci_ftsr_tdfe; /* TX FIFO is always empty in the model */
  }
  return 0U; /* CFCLR / FFCLR read as 0; other regs unmodelled -> 0 */
}

RA8_INTERNAL static void internal_sci_capture_tx_line(uint8_t byte)
{
  if (byte == (uint8_t)'\n') {
    for (uint32_t i = 0U; i < s_uart_pend_len; i++) {
      s_uart_last[i] = s_uart_pend[i];
    }
    s_uart_last[s_uart_pend_len] = '\0';
    /* Route the completed line into the board_console UART channel (which backs
     * the tabbed board-view console + its deeper scrollback). */
    board_console_push(k_board_console_ch_uart, s_uart_last);
    s_uart_pend_len = 0U;
    return;
  }
  if ((byte != (uint8_t)'\r') && (s_uart_pend_len < (uint32_t)(k_uart_line_cap - 1U))) {
    s_uart_pend[s_uart_pend_len++] = (char)byte;
  }
}

RA8_INTERNAL static void internal_sci_reg_write(uint32_t ch, uint64_t off, uint32_t value)
{
  sci_state_t* s = &s_sci[ch];
  if (off == (uint64_t)k_sci_off_tdr) {
    /* Both the polled (ra8_sci_putc_polling) and interrupt (ra8_sci_dispatch_txi)
     * paths launch a frame by writing TDAT[7:0]; FIFO mode also writes TDR. */
    const uint8_t byte = (uint8_t)(value & (uint32_t)k_sci_data_mask);
    s->transmitted++;
    /* Only the console channel carries UART text. Other channels (e.g. SCI0 in
     * Simple-SPI mode for the microSD) move binary frames, so capturing + sinking
     * their TX would spew the SPI traffic as "[uart] SCIn:" garbage -- skip it. */
    if (ch == (uint32_t)k_sci_console_ch) {
      internal_sci_capture_tx_line(byte);
      if (s_sci_tx_sink != nullptr) {
        s_sci_tx_sink((uint8_t)ch, byte);
      }
    }
    /* Pmod2 microSD is SCI0 in Simple-SPI mode: every TDR write clocks a
     * full-duplex frame, so feed the modelled card's response back into this
     * channel's RX queue (RDR/RDRF) -- the real ra8_sci_spi + ra8_sdmmc_spi path
     * then runs against the FAT image exactly as on hardware. */
    if (ch == (uint32_t)k_sci_sd_ch) {
      /* With a card attached, return its modelled response; with none, return
       * 0xFF (CIPO idles high on an empty bus). Always feeding a byte is what
       * keeps RDRF advancing -- otherwise the firmware's full-duplex read polls
       * RDRF forever and every ra8_sdmmc probe burns its whole timeout budget
       * (seconds, per byte), which is the dominant cold-boot stall for any app
       * that probes the SD without a card present. With 0xFF the probe simply
       * sees no valid R1 and fails "no card" promptly, as on real hardware. */
      const uint8_t resp =
        board_sd_attached() ? board_sd_exchange(byte) : (uint8_t)k_sci_spi_cipo_idle;
      board_periph_sci_feed_rx((uint8_t)ch, &resp, 1U);
    }
    /* MikroBUS UART (SCI7) with a modelled AT modem attached: forward each
     * transmitted byte to the modem line model. Most bytes buffer silently; the
     * terminating CR closes an AT command and the model returns the modem's
     * reply, which we feed back into this channel's RX queue so the firmware's
     * genuine ra8_modem_at -> ra8_sci_getc_polling path drains it (EIL == HIL). */
    if ((ch == (uint32_t)board_modem_channel()) && board_modem_attached()) {
      uint8_t        mresp[k_sci_modem_resp_cap] = {};
      const uint32_t mn = board_modem_feed_tx(byte, mresp, (uint32_t)k_sci_modem_resp_cap);
      if (mn > 0U) {
        board_periph_sci_feed_rx((uint8_t)ch, mresp, mn);
      }
    }
  } else if (off == (uint64_t)k_sci_off_ccr0) {
    s->ccr0 = value;
  }
  /* CFCLR / FFCLR are write-1-to-clear: in this model TDRE/TEND stay asserted
   * and RDRF is derived from the live RX queue, so clearing them is a no-op
   * (the firmware re-reads the queue-backed state on its next poll). */
}

RA8_INTERNAL static void internal_sci_tick_channel(uc_engine* uc, uint32_t ch)
{
  if (ch != (uint32_t)k_sci_console_ch) {
    return; /* only the console channel has modelled ELC event numbers */
  }
  const sci_state_t* s = &s_sci[ch];
  /* TX is always empty/ended in the model: while the firmware keeps TIE/TEIE
   * armed (an interrupt-driven ra8_sci_write in flight), re-pend TXI/TEI so the
   * dispatcher pushes the next byte exactly as a real TDRE/TEND would. */
  if ((s->ccr0 & (uint32_t)k_sci_ccr0_te) != 0U) {
    if ((s->ccr0 & (uint32_t)k_sci_ccr0_tie) != 0U) {
      board_periph_icu_raise_event(uc, (uint16_t)k_event_sci8_txi);
    }
    if ((s->ccr0 & (uint32_t)k_sci_ccr0_teie) != 0U) {
      board_periph_icu_raise_event(uc, (uint16_t)k_event_sci8_tei);
    }
  }
  /* RX: while RIE is armed and a host byte is queued, pend RXI so the firmware
   * reads it from RDR in handler context (interrupt-driven receive). */
  if (((s->ccr0 & (uint32_t)k_sci_ccr0_rie) != 0U) && internal_sci_rx_available(s)) {
    board_periph_icu_raise_event(uc, (uint16_t)k_event_sci8_rxi);
  }
}

RA8_INTERNAL static uint64_t internal_sci_read(uc_engine* uc, uint64_t addr, unsigned size)
{
  (void)uc;
  (void)size;
  const uint32_t ch = (uint32_t)((addr - (uint64_t)k_sci_base) / (uint64_t)k_sci_stride);
  return internal_sci_reg_read(ch, (addr - (uint64_t)k_sci_base) % (uint64_t)k_sci_stride);
}

RA8_INTERNAL static void
internal_sci_write(uc_engine* uc, uint64_t addr, unsigned size, uint64_t value)
{
  (void)uc;
  (void)size;
  const uint32_t ch = (uint32_t)((addr - (uint64_t)k_sci_base) / (uint64_t)k_sci_stride);
  internal_sci_reg_write(ch,
                         (addr - (uint64_t)k_sci_base) % (uint64_t)k_sci_stride,
                         (uint32_t)value);
}

RA8_INTERNAL static void internal_sci_tick(uc_engine* uc)
{
  for (uint32_t ch = 0U; ch < (uint32_t)k_sci_count; ch++) {
    internal_sci_tick_channel(uc, ch);
  }
}

RA8_INTERNAL static void internal_sci_reset(void)
{
  for (uint32_t i = 0U; i < (uint32_t)k_sci_count; i++) {
    s_sci[i] = (sci_state_t){};
  }
  s_uart_last[0]  = '\0';
  s_uart_pend[0]  = '\0';
  s_uart_pend_len = 0U;
  /* Re-frame the AT modem's command accumulator on a block reset (--reboot),
   * keeping its attached flag -- the SCI reset re-frames transport, not the
   * modem's presence, mirroring board_periph_eink.c's reset. */
  board_modem_reset();
}

RA8_INTERNAL static void internal_sci_report(void)
{
  for (uint32_t ch = 0U; ch < (uint32_t)k_sci_count; ch++) {
    if ((s_sci[ch].transmitted > 0U) || (s_sci[ch].received > 0U)) {
      (void)priv_emu_io_errf("  SCI%u UART     : TX %u bytes  RX %u bytes  (RX dropped %u)\n",
                             ch,
                             s_sci[ch].transmitted,
                             s_sci[ch].received,
                             s_sci[ch].rx_dropped);
    }
  }
  /* An attached AT modem answers on the modem channel; summarise its traffic
   * alongside the raw SCI byte counts (self-contained -- no main.c edit). */
  board_modem_report();
}

static const board_periph_block_t s_k_sci_block = {
  .base   = (uint64_t)k_sci_base,
  .span   = (uint64_t)k_sci_span,
  .order  = (uint32_t)k_block_order_sci,
  .read   = internal_sci_read,
  .write  = internal_sci_write,
  .tick   = internal_sci_tick,
  .reset  = internal_sci_reset,
  .report = internal_sci_report,
  .name   = "SCI_B UART",
};

[[gnu::constructor]] RA8_INTERNAL static void internal_board_periph_sci_register(void)
{
  board_periph_register_block(&s_k_sci_block);
}